xupsh / pp4fpgas-cn-hlsLinks
HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
☆241Updated 4 years ago
Alternatives and similar repositories for pp4fpgas-cn-hls
Users that are interested in pp4fpgas-cn-hls are comparing it to the libraries listed below
Sorting:
- PYNQ学习资料☆174Updated 6 years ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆376Updated 2 years ago
- 中文:☆107Updated 6 years ago
- CNN accelerator implemented with Spinal HDL☆156Updated last year
- hls code zynq 7020 pynq z2 CNN☆89Updated 6 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆247Updated 7 years ago
- Pynq computer vision examples with an OV5640 camera☆57Updated 5 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 6 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆281Updated 7 years ago
- FPGA Accelerator for CNN using Vivado HLS☆327Updated 4 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆191Updated last year
- achieve softmax in PYNQ with heterogeneous computing.☆67Updated 7 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆166Updated 6 years ago
- ☆38Updated 6 years ago
- using xilinx xc6slx45 to implement mnist net☆84Updated 7 years ago
- FPGA/AES/LeNet/VGG16☆109Updated 7 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆211Updated 2 years ago
- 2019 SEU-Xilinx Summer School☆50Updated 6 years ago
- Implement Tiny YOLO v3 on ZYNQ☆310Updated 8 months ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆114Updated 8 years ago
- FPGA☆159Updated last year
- ☆153Updated 3 weeks ago
- ☆48Updated 7 years ago
- CNN acceleration on virtex-7 FPGA with verilog HDL☆468Updated 7 years ago
- some interesting demos for starters☆93Updated 3 years ago
- ☆141Updated 10 years ago
- DPU on PYNQ☆235Updated 4 months ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆51Updated 5 years ago
- 中文版 Parallel Programming for FPGAs☆758Updated last year
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆104Updated 2 years ago