xupsh / pp4fpgas-cn-hls

Related projects ⓘ

Alternatives and complementary repositories for pp4fpgas-cn-hls

• louisliuwei / PynqDocs
  PYNQ学习资料
  ☆159Updated 4 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆189Updated last year
• hisrg / PYNQ_CNN_Accelerator_Tutorial
  中文：
  ☆93Updated 4 years ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆160Updated 8 months ago
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆137Updated 2 weeks ago
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆136Updated 9 months ago
• lulinchen / cnn_open
  A hardware implementation of CNN, written by Verilog and synthesized on FPGA
  ☆214Updated 5 years ago
• cxdzyq1110 / NPU_on_FPGA
  在FPGA上面实现一个NPU计算单元。能够执行矩阵运算（ADD/ADDi/ADDs/MULT/MULTi/DOT等）、图像处理运算（CONV/POOL等）、非线性映射（RELU/TANH/SIGM等）。
  ☆198Updated 6 years ago
• MasLiang / CNN-On-FPGA
  FPGA
  ☆141Updated 4 months ago
• LeiWang1999 / ZYNQ-NVDLA
  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
  ☆308Updated 10 months ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆77Updated 5 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆299Updated 3 years ago
• aquaxis / IPCORE
  ☆125Updated 9 years ago
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆61Updated 6 years ago
• doonny / basic_knowledge
  Things to learn for new students in the Lab for AI chips and systems of BJTU .
  ☆164Updated 2 weeks ago
• ljgibbslf / SM3_core
  ☆141Updated 4 years ago
• XueTianyu24 / cnn_accelerator
  【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器
  ☆127Updated last year
• papcjy / mnist_fpga
  using xilinx xc6slx45 to implement mnist net
  ☆80Updated 6 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆66Updated 6 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆106Updated 7 years ago
• hunterlew / convolution_network_on_FPGA
  CNN acceleration on virtex-7 FPGA with verilog HDL
  ☆405Updated 6 years ago
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆120Updated 5 years ago
• xupsh / Digital-Design-Lab
  ☆211Updated 3 years ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆132Updated 2 years ago
• mtmd / FPGA_Based_CNN
  FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
  ☆173Updated 7 years ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆88Updated 6 years ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆161Updated 3 months ago
• xupsh / pp4fpgas-cn
  中文版 Parallel Programming for FPGAs
  ☆708Updated 3 months ago
• Yu-Zhewen / Tiny_YOLO_v3_ZYNQ
  Implement Tiny YOLO v3 on ZYNQ
  ☆257Updated 2 years ago
• sazczmh / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆36Updated 5 years ago