Xilinx / QNN-MO-PYNQLinks
☆248Updated 4 years ago
Alternatives and similar repositories for QNN-MO-PYNQ
Users that are interested in QNN-MO-PYNQ are comparing it to the libraries listed below
Sorting:
- FPGA Accelerator for CNN using Vivado HLS☆317Updated 3 years ago
- DPU on PYNQ☆224Updated last year
- Computer Vision Overlays on Pynq☆179Updated 5 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆273Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆72Updated 6 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆325Updated 6 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- PYNQ, Neural network Language model, Overlay☆109Updated 6 years ago
- hls code zynq 7020 pynq z2 CNN☆83Updated 6 years ago
- XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.☆183Updated last year
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆74Updated last year
- ☆46Updated 7 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 6 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆182Updated 8 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆105Updated 7 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- Vitis HLS Library for FINN☆202Updated this week
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆261Updated 2 years ago
- 中文:☆101Updated 5 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆308Updated 4 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆46Updated 5 years ago
- A convolutional neural network implemented in hardware (verilog)☆159Updated 7 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 6 years ago
- ☆89Updated 5 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆113Updated 4 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆30Updated 6 years ago
- Quantized Neural Networks (QNNs) on PYNQ☆692Updated 3 years ago
- PYNQ学习资料☆164Updated 5 years ago
- Convolutional Neural Network Using High Level Synthesis☆86Updated 4 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆237Updated 4 years ago