XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.
☆202Jan 10, 2024Updated 2 years ago
Alternatives and similar repositories for XJTU-Tripler
Users that are interested in XJTU-Tripler are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The second place winner for DAC-SDC 2020☆101Apr 23, 2022Updated 4 years ago
- ☆244Jun 21, 2022Updated 3 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆115Feb 22, 2021Updated 5 years ago
- DAC System Design Contest 2020☆29Jun 11, 2020Updated 5 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Nov 25, 2018Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Light-weighted neural network inference for object detection on small-scale FPGA board☆93May 25, 2019Updated 6 years ago
- ☆11Apr 15, 2024Updated 2 years ago
- Designs for finalist teams of the DAC System Design Contest☆37Jul 8, 2020Updated 5 years ago
- This is an open CNN accelerator for everyone to use☆14Jul 15, 2019Updated 6 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆338Jul 9, 2019Updated 6 years ago
- ☆35Jul 24, 2019Updated 6 years ago
- ☆19Mar 16, 2022Updated 4 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Dec 10, 2022Updated 3 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆286Dec 5, 2019Updated 6 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆912Jul 29, 2024Updated last year
- ☆23Oct 7, 2021Updated 4 years ago
- A RISC-V Symmetric Multiprocessor(SMP) based on TileLink and can run Linux OS☆37Oct 23, 2025Updated 6 months ago
- ☆28Nov 5, 2021Updated 4 years ago
- An OpenCL-based FPGA Accelerator for Convolutional Neural Networks☆1,376Feb 14, 2022Updated 4 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆243Apr 12, 2021Updated 5 years ago
- ☆32Apr 21, 2019Updated 7 years ago
- Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"☆773May 26, 2017Updated 8 years ago
- ☆14Feb 7, 2020Updated 6 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- ☆53Jul 24, 2019Updated 6 years ago
- SqueezeDet implemented in CUDA&TensorRT☆12Nov 2, 2018Updated 7 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28May 11, 2022Updated 3 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆788Dec 10, 2019Updated 6 years ago
- SpV8 is a SpMV kernel written in AVX-512. Artifact for our SpV8 paper @ DAC '21.☆29Mar 16, 2021Updated 5 years ago
- ☆26Nov 4, 2022Updated 3 years ago
- 中文版 Parallel Programming for FPGAs☆766Aug 21, 2024Updated last year
- 中文：☆109Nov 29, 2019Updated 6 years ago
- A light-weight neural network optimizer for different software/hardware backends.☆20Nov 23, 2020Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Design contest for DAC 2018☆17Apr 12, 2018Updated 8 years ago
- ☆72Feb 16, 2023Updated 3 years ago
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆208Jun 25, 2020Updated 5 years ago
- ☆74Mar 22, 2020Updated 6 years ago
- Python on Zynq FPGA for Convolutional Neural Networks☆623May 15, 2018Updated 7 years ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆270May 6, 2023Updated 3 years ago
- 2019 SEU-Xilinx Summer School☆50Jul 26, 2019Updated 6 years ago