Alternatives and similar repositories for CHaiDNN

Users that are interested in CHaiDNN are comparing it to the libraries listed below

• cornell-zhang / bnn-fpga
  Binarized Convolutional Neural Networks on Software-Programmable FPGAs
  ☆308Updated 4 years ago
• Xilinx / QNN-MO-PYNQ
  ☆248Updated 4 years ago
• hsharma35 / dnnweaver2
  Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
  ☆219Updated 6 years ago
• OpenDLA / OpenDLA
  A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.
  ☆144Updated 7 years ago
• JunningWu / Learning-NVDLA-Notes
  NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…
  ☆230Updated 6 years ago
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆278Updated 5 years ago
• xjtuiair-cag / XJTU-Tripler
  XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.
  ☆186Updated last year
• hirayaku / DAC2018-TGIIF
  The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track
  ☆89Updated 6 years ago
• Xilinx / ml-suite
  Getting Started with Xilinx ML Suite
  ☆339Updated 4 years ago
• CSL-KU / firesim-nvdla
  FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud
  ☆163Updated 3 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆319Updated 3 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆112Updated 8 years ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆354Updated 7 months ago
• Xilinx / SDSoC-Tutorials
  SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
  ☆154Updated 5 years ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆205Updated 3 weeks ago
• mtmd / FPGA_Based_CNN
  FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.
  ☆183Updated 8 years ago
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆92Updated 6 years ago
• embedeep / Free-TPU
  Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…
  ☆261Updated 2 years ago
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆428Updated 5 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆225Updated last week
• nvdla / doc
  Documentation for NVDLA.
  ☆251Updated 3 weeks ago
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆157Updated 6 years ago
• TF2-Engine / TF2
  An Open Source Deep Learning Inference Engine Based on FPGA
  ☆159Updated 4 years ago
• Xilinx / Vitis_Embedded_Platform_Source
  ☆130Updated 2 months ago
• Xilinx / Embedded-Reference-Platforms-User-Guide
  Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …
  ☆11Updated last year
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆160Updated 7 years ago
• TomG008 / SkyNet
  ☆241Updated 3 years ago
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆94Updated 4 years ago
• nachiket / papaa-opencl
  OpenCL Labs for PAPAA Summer School 2016 Edition
  ☆46Updated 8 years ago
• Xilinx / SDSoC_Examples
  ☆84Updated 5 years ago