Xilinx / CHaiDNNLinks
HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
☆325Updated 5 years ago
Alternatives and similar repositories for CHaiDNN
Users that are interested in CHaiDNN are comparing it to the libraries listed below
Sorting:
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆306Updated 4 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆215Updated 6 years ago
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆227Updated 6 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆143Updated 7 years ago
- ☆247Updated 4 years ago
- DPU on PYNQ☆222Updated last year
- A FPGA Based CNN accelerator, following Google's TPU V1.☆155Updated 5 years ago
- Vitis HLS Library for FINN☆198Updated 2 weeks ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆347Updated 5 months ago
- FPGA Accelerator for CNN using Vivado HLS☆317Updated 3 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆273Updated 5 years ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆259Updated 2 years ago
- Getting Started with Xilinx ML Suite☆339Updated 4 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆181Updated 8 years ago
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆422Updated 5 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆154Updated 5 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆105Updated 7 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆162Updated 3 years ago
- XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.☆182Updated last year
- ☆128Updated 2 weeks ago
- ☆84Updated 4 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- ☆118Updated 3 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆319Updated 5 months ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆111Updated 6 years ago
- ☆335Updated 5 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆186Updated 7 years ago
- Board files to build Ultra 96 PYNQ image☆155Updated 6 months ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆338Updated last year