louisliuwei / PynqDocs
PYNQ学习资料
☆163Updated 5 years ago
Alternatives and similar repositories for PynqDocs:
Users that are interested in PynqDocs are comparing it to the libraries listed below
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆236Updated 3 years ago
- 中文:☆97Updated 5 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆172Updated last year
- hls code zynq 7020 pynq z2 CNN☆81Updated 6 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆197Updated last year
- FPGA☆151Updated 8 months ago
- achieve softmax in PYNQ with heterogeneous computing.☆63Updated 6 years ago
- ☆130Updated 9 years ago
- using xilinx xc6slx45 to implement mnist net☆83Updated 6 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆138Updated last year
- CNN accelerator implemented with Spinal HDL☆146Updated last year
- A FPGA Based CNN accelerator, following Google's TPU V1.☆144Updated 5 years ago
- ☆39Updated 6 years ago
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆59Updated 6 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆109Updated 7 years ago
- Pynq computer vision examples with an OV5640 camera☆45Updated 4 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆226Updated 6 years ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆331Updated last year
- FPGA Accelerator for CNN using Vivado HLS☆313Updated 3 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 5 years ago
- FPGA/AES/LeNet/VGG16☆99Updated 6 years ago
- Convolutional Neural Network Using High Level Synthesis☆85Updated 4 years ago
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆156Updated 4 months ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆223Updated 6 years ago
- An LeNet RTL implement onto FPGA☆44Updated 6 years ago
- ☆142Updated last month
- Implement Tiny YOLO v3 on ZYNQ☆284Updated 2 years ago
- ☆61Updated 2 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago