Alternatives and similar repositories for N3H_Core

Users that are interested in N3H_Core are comparing it to the libraries listed below

• fffasttime / AnyPackingNet
  ☆27Updated 2 months ago
• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆20Updated 2 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago
• CASR-HKU / DPACS
  ☆18Updated 2 years ago
• heymesut / SJTU_microe
  A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC
  ☆28Updated 3 years ago
• gicLAB / SECDA
  ☆22Updated 2 years ago
• jgoeders / dac_sdc_2021_designs
  ☆20Updated 3 years ago
• DNN-Accelerators / Open-Source-IPs
  ☆33Updated 6 years ago
• os-hxfan / Static_BFP_HW
  This repository contains the hardware implementation for Static BFP convolution on FPGA
  ☆10Updated 5 years ago
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 4 years ago
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated last year
• GATECH-EIC / DNN-Chip-Predictor
  [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…
  ☆25Updated 2 years ago
• PSCLab-ASU / Systolic-CNN
  ☆16Updated 4 years ago
• arkhodamoradi / s2n2
  ☆17Updated 4 years ago
• jgoeders / dac_sdc_2022_designs
  ☆17Updated 2 years ago
• pgroupATusc / GraphACT
  Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
  ☆10Updated 4 years ago
• hqjenny / CoDeNet
  ☆19Updated 4 years ago
• souravsanyal06 / DNN-Dataflow-simulator
  Implementation of Input Stationary, Weight Stationary and Output Stationary dataflow for given neural network on a tiled architecture
  ☆9Updated 5 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆52Updated 3 years ago
• enyac-group / MaxEVA
  MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)
  ☆20Updated last year
• CASR-HKU / AGNA-FCCM2023
  ☆12Updated last year
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆39Updated 8 months ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 7 years ago
• horizon-research / systolic-array-dataflow-optimizer
  A general framework for optimizing DNN dataflow on systolic array
  ☆36Updated 4 years ago
• GATECH-EIC / Auto-NBA
  [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…
  ☆15Updated 3 years ago
• dac-sdc / fpga_starter_2023
  ☆8Updated 2 years ago
• mustard-seed / SparseDNNAccelerator
  Sparse CNN Accelerator targeting Intel FPGA
  ☆11Updated 3 years ago
• KULeuven-MICAS / tinyvers
  TinyVers Heterogeneous SoC consists of a reconfigurable FlexML accelerator, a RISC-V processor, an eMRAM and a power management system.
  ☆19Updated last year
• abdelfattah-lab / BRAMAC
  ☆10Updated 6 months ago
• aravinds92 / Systolic-Array
  Systolic array based hardware for Image processing on the SPARTAN-6 FPGA
  ☆12Updated 9 years ago