Alternatives and similar repositories for gemm_hls:

Users that are interested in gemm_hls are comparing it to the libraries listed below

• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆318Updated 3 months ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆192Updated last week
• Xilinx / Vitis_Accel_Examples
  Vitis_Accel_Examples
  ☆537Updated 3 weeks ago
• spcl / hls_tutorial_examples
  Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
  ☆199Updated 3 years ago
• Xilinx / Vitis-HLS-Introductory-Examples
  ☆676Updated 5 months ago
• abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU
  IC implementation of Systolic Array for TPU
  ☆232Updated 6 months ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆219Updated last year
• hsharma35 / dnnweaver2
  Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
  ☆210Updated 6 years ago
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆270Updated 5 years ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆267Updated last week
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆417Updated 5 years ago
• taoyilee / clacc
  Deep Learning Accelerator (Convolution Neural Networks)
  ☆179Updated 7 years ago
• rapidstream-org / rapidstream-tapa
  RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
  ☆168Updated this week
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆158Updated 7 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆196Updated 2 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆317Updated 3 years ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆218Updated 2 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆164Updated last year
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆87Updated 4 years ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆213Updated last month
• LeiWang1999 / ZYNQ-NVDLA
  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
  ☆335Updated last year
• Xilinx / Vitis-In-Depth-Tutorial
  ☆118Updated 3 years ago
• cornell-zhang / bnn-fpga
  Binarized Convolutional Neural Networks on Software-Programmable FPGAs
  ☆303Updated 4 years ago
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆150Updated 5 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆149Updated 10 months ago
• karthisugumar / CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2
  A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…
  ☆157Updated 5 years ago
• Er1cZ / Deploying_CNN_on_FPGA_using_OpenCL
  Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…
  ☆109Updated 6 years ago
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆140Updated this week
• sld-columbia / esp
  Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
  ☆369Updated this week
• SingularityKChen / dl_accelerator
  Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions
  ☆190Updated 4 years ago