Xilinx / Vitis-HLS-Introductory-ExamplesLinks
☆758Updated 2 weeks ago
Alternatives and similar repositories for Vitis-HLS-Introductory-Examples
Users that are interested in Vitis-HLS-Introductory-Examples are comparing it to the libraries listed below
Sorting:
- Vitis_Accel_Examples☆582Updated last month
- Vitis In-Depth Tutorials☆1,521Updated last week
- ☆464Updated last year
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆374Updated last year
- Verilog AXI stream components for FPGA implementation☆858Updated 11 months ago
- ☆250Updated last week
- ☆312Updated last week
- Vitis Libraries☆1,065Updated last month
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆437Updated 6 years ago
- synthesiseable ieee 754 floating point library in verilog☆717Updated 2 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆334Updated last year
- ☆666Updated last month
- ☆497Updated 3 weeks ago
- Verilog AXI components for FPGA implementation☆1,952Updated 11 months ago
- DPU on PYNQ☆242Updated 5 months ago
- Parallel Programming for FPGAs -- An open-source high-level synthesis book☆875Updated 3 weeks ago
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆414Updated 4 months ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,487Updated last week
- AMBA bus lecture material☆503Updated 6 years ago
- IC implementation of Systolic Array for TPU☆330Updated last year
- Vitis HLS Library for FINN☆214Updated 3 weeks ago
- AXI, AXI stream, Ethernet, and PCIe components in System Verilog☆609Updated 3 weeks ago
- Verilog UART☆533Updated 11 months ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆383Updated 2 years ago
- Verilog PCI express components☆1,526Updated last year
- Dataflow QNN inference accelerator examples on FPGAs☆242Updated 5 months ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆180Updated last year
- Implementation of a Tensor Processing Unit for embedded systems and the IoT.☆541Updated 7 years ago
- Common SystemVerilog components☆706Updated this week
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆289Updated 7 years ago