Alternatives and similar repositories for Vitis-HLS-Introductory-Examples

Users that are interested in Vitis-HLS-Introductory-Examples are comparing it to the libraries listed below

• Xilinx / Vitis_Accel_Examples
  Vitis_Accel_Examples
  ☆556Updated last week
• Xilinx / Vitis-Tutorials
  Vitis In-Depth Tutorials
  ☆1,433Updated last week
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆354Updated 7 months ago
• Xilinx / PYNQ_Workshop
  ☆442Updated 11 months ago
• Xilinx / Vivado-Design-Tutorials
  ☆218Updated 3 weeks ago
• Xilinx / Vitis_Libraries
  Vitis Libraries
  ☆1,004Updated this week
• Xilinx / XilinxBoardStore
  ☆290Updated last week
• alexforencich / verilog-axis
  Verilog AXI stream components for FPGA implementation
  ☆822Updated 6 months ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆226Updated 2 weeks ago
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆428Updated 5 years ago
• Xilinx / Vitis-AI-Tutorials
  ☆459Updated last year
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆206Updated 3 weeks ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆322Updated 7 months ago
• KastnerRG / pp4fpgas
  Parallel Programming for FPGAs -- An open-source high-level synthesis book
  ☆852Updated 7 months ago
• xupsh / pp4fpgas-cn-hls
  HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
  ☆237Updated 4 years ago
• dawsonjon / fpu
  synthesiseable ieee 754 floating point library in verilog
  ☆666Updated 2 years ago
• Digilent / vivado-library
  ☆631Updated last month
• abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU
  IC implementation of Systolic Array for TPU
  ☆269Updated 10 months ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆227Updated 5 months ago
• jofrfu / tinyTPU
  Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  ☆497Updated 6 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆319Updated 3 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆158Updated last year
• AniketBadhan / Convolutional-Neural-Network
  Implementation of CNN using Verilog
  ☆224Updated 7 years ago
• EDDI-RobotAcademy / SDC-AI-LectureNotes
  It's for SDC-AI Lecture Notes
  ☆15Updated 11 months ago
• Xilinx / finn
  Dataflow compiler for QNN inference on FPGAs
  ☆859Updated this week
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆367Updated last year
• KHWeb19 / LectureContents
  수업 자료는 모두 여기에 업로드 됩니다.
  ☆27Updated 3 years ago
• KHWeb19 / Homework
  과제는 여기에 제출합니다.
  ☆26Updated 3 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆220Updated 2 years ago
• LeiWang1999 / ZYNQ-NVDLA
  NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
  ☆354Updated last year