fpgasystems / spooNNLinks
FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
☆279Updated 5 years ago
Alternatives and similar repositories for spooNN
Users that are interested in spooNN are comparing it to the libraries listed below
Sorting:
- A convolutional neural network implemented in hardware (verilog)☆163Updated 8 years ago
- ☆250Updated 5 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆186Updated 8 years ago
- Vitis HLS Library for FINN☆208Updated 3 weeks ago
- PYNQ, Neural network Language model, Overlay☆111Updated 6 years ago
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆433Updated 5 years ago
- FPGA Accelerator for CNN using Vivado HLS☆325Updated 4 years ago
- DPU on PYNQ☆228Updated 2 months ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆224Updated 6 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆107Updated 7 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆366Updated 9 months ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 8 years ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆112Updated 7 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆102Updated last year
- Xilinx Deep Learning IP☆94Updated 4 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆142Updated 7 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆161Updated 6 years ago
- Convolutional Neural Network Using High Level Synthesis☆88Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆74Updated 7 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆188Updated last year
- FPGA/AES/LeNet/VGG16☆108Updated 7 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆332Updated 6 years ago
- Implementation of CNN using Verilog☆228Updated 8 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆154Updated 5 years ago
- Dataflow QNN inference accelerator examples on FPGAs☆236Updated 2 months ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆265Updated 2 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆194Updated 7 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 3 years ago
- Computer Vision Overlays on Pynq☆188Updated 6 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆242Updated 6 years ago