Xilinx / DPU-PYNQ
DPU on PYNQ
☆219Updated last year
Alternatives and similar repositories for DPU-PYNQ:
Users that are interested in DPU-PYNQ are comparing it to the libraries listed below
- Vitis HLS Library for FINN☆192Updated last week
- Board files to build Ultra 96 PYNQ image☆154Updated 4 months ago
- Dataflow QNN inference accelerator examples on FPGAs☆213Updated last month
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆109Updated 6 years ago
- ☆246Updated 4 years ago
- ☆89Updated last year
- ☆125Updated 5 months ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆149Updated 10 months ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆71Updated 4 years ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆102Updated 2 years ago
- Convolutional Neural Network Using High Level Synthesis☆87Updated 4 years ago
- PYNQ Composabe Overlays☆71Updated 10 months ago
- Convolutional accelerator kernel, target ASIC & FPGA☆196Updated 2 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- hls code zynq 7020 pynq z2 CNN☆85Updated 6 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 7 years ago
- ☆118Updated 3 years ago
- CNN accelerator implemented with Spinal HDL☆149Updated last year
- A FPGA Based CNN accelerator, following Google's TPU V1.☆150Updated 5 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆177Updated last year
- IC implementation of Systolic Array for TPU☆232Updated 6 months ago
- ☆200Updated last week
- PYNQ学习资料☆163Updated 5 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆179Updated 7 years ago
- FPGA/AES/LeNet/VGG16☆103Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆270Updated 5 years ago
- Kria Vitis platforms and overlays☆99Updated last month
- A convolutional neural network implemented in hardware (verilog)☆158Updated 7 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆157Updated 5 years ago