Alternatives and similar repositories for DPU-PYNQ:

Users that are interested in DPU-PYNQ are comparing it to the libraries listed below

• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆191Updated last week
• Xilinx / Vitis_Embedded_Platform_Source
  ☆122Updated 3 months ago
• Xilinx / QNN-MO-PYNQ
  ☆247Updated 4 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆154Updated 3 months ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆207Updated 2 months ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆86Updated 4 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆71Updated 6 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆101Updated 2 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆104Updated 6 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆70Updated 9 months ago
• Xilinx / Vitis-In-Depth-Tutorial
  ☆117Updated 3 years ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆79Updated 6 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆178Updated 5 years ago
• Xilinx / Kria-PYNQ
  PYNQ support and examples for Kria SOMs
  ☆103Updated 7 months ago
• zhan6841 / FPGA-Accelerator-for-AES-LeNet-VGG16
  FPGA/AES/LeNet/VGG16
  ☆99Updated 6 years ago
• Xilinx / Vivado-Design-Tutorials
  ☆190Updated 2 months ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆172Updated last year
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆144Updated 9 months ago
• cathalmccabe / PYNQ_tutorials
  ☆86Updated last year
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆143Updated 5 years ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆331Updated 2 months ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆57Updated 3 years ago
• lirui-shanghaitech / CNN-Accelerator-VLSI
  Convolutional accelerator kernel, target ASIC & FPGA
  ☆185Updated last year
• sumilao / Zynq-7000-DPU-TRD
  Zynq-7000 DPU TRD
  ☆44Updated 5 years ago
• jiangwx / SkrSkr
  The second place winner for DAC-SDC 2020
  ☆97Updated 2 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆106Updated 5 years ago
• wutianze / dnndk-pynqz2
  First lesson for you to use DNNDK, also it can be helpful for your AI learning
  ☆68Updated last year
• abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU
  IC implementation of Systolic Array for TPU
  ☆204Updated 5 months ago
• louisliuwei / PynqDocs
  PYNQ学习资料
  ☆162Updated 5 years ago