drichmond / PYNQ-HLS
A Tutorial on Putting High-Level Synthesis cores in PYNQ
☆104Updated 7 years ago
Alternatives and similar repositories for PYNQ-HLS
Users that are interested in PYNQ-HLS are comparing it to the libraries listed below
Sorting:
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆103Updated 2 years ago
- DPU on PYNQ☆220Updated last year
- PYNQ Composabe Overlays☆71Updated 10 months ago
- Vitis HLS Library for FINN☆195Updated last week
- Board files to build Ultra 96 PYNQ image☆154Updated 4 months ago
- ☆64Updated 6 years ago
- PYNQ, Neural network Language model, Overlay☆106Updated 6 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆153Updated 5 years ago
- Convolutional Neural Network Using High Level Synthesis☆87Updated 4 years ago
- ☆87Updated 5 years ago
- Convolution Neural Network of vgg19 model in verilog☆47Updated 7 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆108Updated 5 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆40Updated 3 years ago
- A convolutional neural network implemented in hardware (verilog)☆157Updated 7 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆30Updated 6 years ago
- ☆28Updated 7 years ago
- Computer Vision Overlays on Pynq☆178Updated 5 years ago
- This project is trying to create a base vitis platform to run with DPU☆47Updated 4 years ago
- hls code zynq 7020 pynq z2 CNN☆85Updated 6 years ago
- ☆246Updated 4 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 7 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆58Updated 3 years ago
- ☆45Updated 6 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆72Updated 6 years ago
- ☆65Updated 3 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆71Updated 4 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆74Updated last year
- ☆126Updated 5 months ago
- Xilinx Deep Learning IP☆91Updated 4 years ago