An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
☆1,367Feb 14, 2022Updated 4 years ago
Alternatives and similar repositories for PipeCNN
Users that are interested in PipeCNN are comparing it to the libraries listed below
Sorting:
- Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"☆768May 26, 2017Updated 8 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆786Dec 10, 2019Updated 6 years ago
- FPGA Accelerator for CNN using Vivado HLS☆333Oct 25, 2021Updated 4 years ago
- Python on Zynq FPGA for Convolutional Neural Networks☆624May 15, 2018Updated 7 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆186Jan 28, 2017Updated 9 years ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆893Jul 29, 2024Updated last year
- CNN acceleration on virtex-7 FPGA with verilog HDL☆474Feb 27, 2018Updated 8 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs (FPGA'17)☆311Nov 16, 2020Updated 5 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆336Jul 9, 2019Updated 6 years ago
- This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning an…☆2,056Nov 8, 2025Updated 3 months ago
- 使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用☆581Jun 18, 2018Updated 7 years ago
- 中文版 Parallel Programming for FPGAs☆760Aug 21, 2024Updated last year
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆116Jun 24, 2017Updated 8 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆376Jan 20, 2025Updated last year
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆115Jun 27, 2018Updated 7 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆142Mar 30, 2018Updated 7 years ago
- Machine learning on FPGAs using HLS☆1,812Updated this week
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Jul 24, 2017Updated 8 years ago
- An OpenCL-Based FPGA Accelerator for Compressed YOLOv2☆39May 27, 2021Updated 4 years ago
- Quantized Neural Networks (QNNs) on PYNQ☆704Jan 4, 2022Updated 4 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆226Apr 22, 2019Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆283Dec 5, 2019Updated 6 years ago
- Caffe to VHDL☆68Jun 17, 2020Updated 5 years ago
- ☆119Dec 20, 2017Updated 8 years ago
- RTL, Cmodel, and testbench for NVDLA☆2,025Mar 2, 2022Updated 3 years ago
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆443Dec 2, 2019Updated 6 years ago
- collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning☆567Feb 3, 2024Updated 2 years ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆273May 6, 2023Updated 2 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆241Apr 12, 2021Updated 4 years ago
- Dataflow compiler for QNN inference on FPGAs☆942Feb 20, 2026Updated last week
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆335Jan 20, 2025Updated last year
- XJTU-Tripler is based on HiPU100, an FPGA-friendly DNN accelerator, developed by CAG, Institute of AI & Robotics, XJTU.☆196Jan 10, 2024Updated 2 years ago
- Implementation of a Tensor Processing Unit for embedded systems and the IoT.☆543Jan 5, 2019Updated 7 years ago
- ☆243Jun 21, 2022Updated 3 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆144Nov 16, 2017Updated 8 years ago
- Verilog Generator of Neural Net Digit Detector for FPGA☆312Sep 7, 2022Updated 3 years ago
- ☆250Oct 13, 2020Updated 5 years ago
- OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.☆82Oct 3, 2023Updated 2 years ago
- Convolutional accelerator kernel, target ASIC & FPGA☆244Apr 10, 2023Updated 2 years ago