canteen-man / CNN_FPGA_ZYNQ_PYNQ
hls code zynq 7020 pynq z2 CNN
☆77Updated 5 years ago
Related projects ⓘ
Alternatives and complementary repositories for CNN_FPGA_ZYNQ_PYNQ
- 中文:☆93Updated 4 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆160Updated 8 months ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆89Updated 11 months ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆66Updated 6 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆44Updated 4 years ago
- The CNN based on the Xilinx Vivado HLS☆35Updated 3 years ago
- An LeNet RTL implement onto FPGA☆39Updated 6 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆106Updated 7 years ago
- FPGA and GPU acceleration of LeNet5☆35Updated 5 years ago
- FPGA/AES/LeNet/VGG16☆88Updated 6 years ago
- ☆43Updated 6 years ago
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆19Updated 5 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆34Updated 4 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆35Updated 4 years ago
- ☆45Updated last year
- Convolutional Neural Network Using High Level Synthesis☆83Updated 4 years ago
- Simulating implement of vgg16 network on Zynq-7020 FPGA☆36Updated 5 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 5 years ago
- PYNQ学习资料☆159Updated 4 years ago
- The second place winner for DAC-SDC 2020☆95Updated 2 years ago
- Some attempts to build CNN on PYNQ.☆24Updated 5 years ago
- 2019 SEU-Xilinx Summer School☆46Updated 5 years ago
- A DNN Accelerator implemented with RTL.☆61Updated last year
- FPGA☆141Updated 4 months ago
- to illustrate how to removal a Neural Network from pc to FPGA board ,it contain all the code include c code worked in pc,HLS prj acceler…☆70Updated 3 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆45Updated 4 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆36Updated 5 years ago
- Convolution Neural Network of vgg19 model in verilog☆43Updated 6 years ago
- using xilinx xc6slx45 to implement mnist net☆80Updated 6 years ago
- Zynq-7000 DPU TRD☆43Updated 5 years ago