hsharma35 / dnnweaver2Links
Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
☆224Updated 6 years ago
Alternatives and similar repositories for dnnweaver2
Users that are interested in dnnweaver2 are comparing it to the libraries listed below
Sorting:
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆312Updated 4 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆332Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆280Updated 5 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆141Updated 5 years ago
- Vitis HLS Library for FINN☆208Updated last week
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆201Updated 5 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆366Updated 8 months ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 3 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆164Updated 3 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆145Updated 7 years ago
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆230Updated 6 years ago
- Explore the energy-efficient dataflow scheduling for neural networks.☆227Updated 5 years ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆225Updated 2 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆115Updated 4 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆159Updated 6 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆149Updated 4 months ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆67Updated 5 years ago
- ☆365Updated 2 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆194Updated 7 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆167Updated last year
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆430Updated 5 years ago
- A pre-RTL, power-performance model for fixed-function accelerators☆180Updated last year
- Residual Binarized Neural Network☆43Updated 7 years ago
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆117Updated 3 months ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆91Updated 6 years ago
- ☆60Updated 5 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆93Updated 6 years ago
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆232Updated last year
- The second place winner for DAC-SDC 2020☆97Updated 3 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆94Updated 4 years ago