Alternatives and similar repositories for SMI

Users that are interested in SMI are comparing it to the libraries listed below

• argonne-lcf / AIaccelerators-SC23-tutorial
  AI Accelerators-SC23-tutorial Repository
  ☆11Updated last year
• Blaok / tapa
  TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…
  ☆19Updated 9 months ago
• spcl / absinthe
  Absinthe is an optimization framework to fuse and tile stencil codes in one shot
  ☆14Updated 5 years ago
• CMU-SAFARI / SPARTA
  A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…
  ☆19Updated last year
• Xilinx / xacc
  Heterogeneous Accelerated Computed Cluster (HACC) Resources Page
  ☆21Updated last week
• spcl / FBLAS
  BLAS implementation for Intel FPGA
  ☆78Updated 4 years ago
• spcl / stencilflow
  ☆16Updated 3 years ago
• UCLA-VAST / heterohalide
  HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
  ☆15Updated 4 years ago
• OCT-FPGA / OCT-Tutorials
  ☆30Updated 3 weeks ago
• cornell-zhang / UniSparse
  Code base for OOPSLA'24 paper: UniSparse: An Intermediate Language for General Sparse Format Customization
  ☆30Updated 7 months ago
• pc2 / HPCC_FPGA
  A OpenCL-based FPGA benchmark suite for HPC
  ☆33Updated 4 months ago
• template-hls / template-hls-float
  ☆29Updated 6 years ago
• sstsimulator / sst-macro
  SST Macro Element Library
  ☆37Updated last month
• Blaok / fpga-runtime
  ☆12Updated 10 months ago
• IntelLabs / t2sp
  Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)
  ☆31Updated last year
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆33Updated 2 years ago
• fpga-opencl-benchmarks / rodinia_fpga
  Rodinia Benchmark Suite for OpenCL-based FPGAs
  ☆31Updated 2 years ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆22Updated 3 years ago
• sstsimulator / sst-tutorials
  Tutorial Material from the SST Team
  ☆20Updated 3 weeks ago
• Xilinx / HPCG_FPGA
  ☆9Updated 3 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆59Updated 11 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• sfu-arch / muir
  ☆24Updated 4 years ago
• UCLA-VAST / soda
  Stencil with Optimized Dataflow Architecture
  ☆16Updated last year
• StanfordAHA / CGRAFlow
  Integration test for entire CGRA flow
  ☆12Updated 5 years ago
• esa-tu-darmstadt / spn-compiler
  Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.
  ☆23Updated 6 months ago
• pnnl / COMET
  ☆40Updated last week
• falconcomputing / merlin-compiler
  Falcon Merlin Compiler
  ☆41Updated 5 years ago
• stillwater-sc / hpr-blas
  High-Performance Reproducible BLAS using posit arithmetic
  ☆12Updated 3 years ago
• zhguanw / lin-analyzer
  A high-level performance analysis tool for FPGA-based accelerators
  ☆20Updated 8 years ago