Xilinx / gemxLinks
Matrix Operation Library for FPGA https://xilinx.github.io/gemx/
☆63Updated 6 years ago
Alternatives and similar repositories for gemx
Users that are interested in gemx are comparing it to the libraries listed below
Sorting:
- Introductory examples for using PYNQ with Alveo☆52Updated 2 years ago
- Train and deploy LUT-based neural networks on FPGAs☆101Updated last year
- ☆82Updated 9 months ago
- ☆83Updated 5 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆168Updated 2 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆67Updated 8 years ago
- HLS branch of Halide☆79Updated 7 years ago
- ☆88Updated 2 years ago
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆204Updated 4 years ago
- Caffe to VHDL☆68Updated 5 years ago
- ☆30Updated 6 years ago
- ☆28Updated 7 years ago
- Next generation CGRA generator☆116Updated this week
- CNN accelerator☆27Updated 8 years ago
- ☆47Updated last year
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Updated 2 years ago
- Tutorials on HLS Design☆52Updated 5 years ago
- A DSL for Systolic Arrays☆82Updated 6 years ago
- Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.☆55Updated 7 years ago
- Falcon Merlin Compiler☆41Updated 5 years ago
- ☆61Updated 5 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆146Updated 5 years ago
- SDAccel Development Environment Tutorials☆110Updated 5 years ago
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Updated last year
- Template for projects using the Hwacha data-parallel accelerator☆34Updated 5 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆135Updated 5 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆107Updated 7 years ago
- FPGA version of Rodinia in HLS C/C++☆40Updated 4 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 5 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆69Updated 6 years ago