Xilinx / finnLinks
Dataflow compiler for QNN inference on FPGAs
☆880Updated this week
Alternatives and similar repositories for finn
Users that are interested in finn are comparing it to the libraries listed below
Sorting:
- ☆469Updated last year
- Tutorial notebooks for hls4ml☆375Updated 2 weeks ago
- Dataflow QNN inference accelerator examples on FPGAs☆232Updated last month
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆430Updated 5 years ago
- Vitis HLS Library for FINN☆208Updated last week
- ☆249Updated 4 years ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆366Updated 8 months ago
- Vitis_Accel_Examples☆559Updated last month
- DPU on PYNQ☆228Updated last month
- ☆719Updated 3 months ago
- Implementation of a Tensor Processing Unit for embedded systems and the IoT.☆509Updated 6 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆280Updated 5 years ago
- Vitis In-Depth Tutorials☆1,459Updated 2 weeks ago
- Machine learning on FPGAs using HLS☆1,648Updated this week
- Quantized Neural Networks (QNNs) on PYNQ☆702Updated 3 years ago
- ☆449Updated last year
- Vitis Libraries☆1,024Updated 2 weeks ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆332Updated 6 years ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆365Updated last year
- FPGA Accelerator for CNN using Vivado HLS☆323Updated 3 years ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆265Updated 2 years ago
- Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.☆1,657Updated 6 months ago
- Berkeley's Spatial Array Generator☆1,066Updated last month
- Computer Vision Overlays on Pynq☆187Updated 6 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆328Updated 8 months ago
- Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks☆619Updated 5 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆224Updated 6 years ago
- Run Time for AIE and FPGA based platforms☆629Updated this week
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆873Updated last year
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆312Updated 4 years ago