cornell-zhang / heterocl

Related projects: ⓘ

• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆192Updated last year
• NVlabs / timeloop
  Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.
  ☆321Updated last week
• UIUC-ChenLab / scalehls
  A scalable High-Level Synthesis framework on MLIR
  ☆217Updated 4 months ago
• harvard-acc / gem5-aladdin
  End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
  ☆212Updated last year
• apache / tvm-vta
  Open, Modular, Deep Learning Accelerator
  ☆249Updated 5 months ago
• scalesim-project / scale-sim-v2
  Repository to host and maintain scale-sim-v2 code
  ☆212Updated last week
• Xilinx / mlir-aie
  An MLIR-based toolchain for AMD AI Engine-enabled devices.
  ☆283Updated this week
• accel-sim / accel-sim-framework
  This is the top-level repository for the Accel-Sim framework.
  ☆290Updated 2 weeks ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆253Updated last week
• stanford-mast / nn_dataflow
  Explore the energy-efficient dataflow scheduling for neural networks.
  ☆214Updated 4 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆158Updated 10 months ago
• CSL-KU / firesim-nvdla
  FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud
  ☆160Updated 2 years ago
• hsharma35 / dnnweaver2
  Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.
  ☆199Updated 5 years ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆298Updated 2 years ago
• ARM-software / SCALE-Sim
  ☆328Updated last year
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆124Updated 2 weeks ago
• maestro-project / maestro
  An analytical cost model evaluating DNN mappings (dataflows and tiling).
  ☆178Updated 5 months ago
• Xilinx / mlir-air
  ☆76Updated this week
• areuther / ai-accelerators
  CSV spreadsheets and other material for AI accelerator survey papers
  ☆145Updated 7 months ago
• harvard-acc / ALADDIN
  A pre-RTL, power-performance model for fixed-function accelerators
  ☆163Updated 8 months ago
• JunningWu / Learning-NVDLA-Notes
  NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…
  ☆219Updated 5 years ago
• CMU-SAFARI / ramulator2
  Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …
  ☆217Updated 2 months ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆297Updated 4 months ago
• rapidstream-org / rapidstream-tapa
  RapidStream-TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
  ☆149Updated this week
• xuanyoya / Interstellar-CNN-scheduler
  Tool for optimize CNN blocking
  ☆93Updated 4 years ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆115Updated 3 months ago
• Xilinx / CHaiDNN
  HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
  ☆320Updated 5 years ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆113Updated 4 years ago
• ucb-bar / gemmini
  Berkeley's Spatial Array Generator
  ☆777Updated last month
• cornell-zhang / allo
  Allo: A Programming Model for Composable Accelerator Design
  ☆122Updated this week