Alternatives and similar repositories for Vitis_Libraries

Users that are interested in Vitis_Libraries are comparing it to the libraries listed below

• Xilinx / Vitis-Tutorials
  Vitis In-Depth Tutorials
  ☆1,519Updated 3 weeks ago
• Xilinx / Vitis_Accel_Examples
  Vitis_Accel_Examples
  ☆578Updated last month
• Xilinx / Vitis-HLS-Introductory-Examples
  ☆752Updated last month
• Xilinx / XRT
  Run Time for AIE and FPGA based platforms
  ☆641Updated this week
• Xilinx / Vitis-AI-Tutorials
  ☆487Updated this week
• Xilinx / finn
  Dataflow compiler for QNN inference on FPGAs
  ☆929Updated this week
• Xilinx / Vitis-AI
  Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
  ☆1,701Updated 3 weeks ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆373Updated 11 months ago
• Xilinx / PYNQ_Workshop
  ☆462Updated last year
• xupsh / pp4fpgas-cn
  中文版 Parallel Programming for FPGAs
  ☆760Updated last year
• KastnerRG / pp4fpgas
  Parallel Programming for FPGAs -- An open-source high-level synthesis book
  ☆871Updated this week
• Digilent / vivado-library
  ☆665Updated 2 weeks ago
• Xilinx / dma_ip_drivers
  Xilinx QDMA IP Drivers
  ☆753Updated last month
• IBM / AccDNN
  A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
  ☆437Updated 6 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆238Updated 5 months ago
• Xilinx / xfopencv
  ☆339Updated 5 years ago
• dhm2013724 / yolov2_xilinx_fpga
  A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard
  ☆884Updated last year
• fpgasystems / fpga-network-stack
  Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)
  ☆887Updated 6 months ago
• jofrfu / tinyTPU
  Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  ☆532Updated 7 years ago
• Xilinx / BNN-PYNQ
  Quantized Neural Networks (QNNs) on PYNQ
  ☆702Updated 4 years ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆334Updated 11 months ago
• Xilinx / Vitis_Embedded_Platform_Source
  ☆137Updated last month
• Xilinx / XilinxBoardStore
  ☆311Updated last week
• Xilinx / Vivado-Design-Tutorials
  ☆245Updated last month
• xupsh / pp4fpgas-cn-hls
  HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
  ☆240Updated 4 years ago
• changwoolee / lenet5_hls
  FPGA Accelerator for CNN using Vivado HLS
  ☆330Updated 4 years ago
• alexforencich / verilog-axis
  Verilog AXI stream components for FPGA implementation
  ☆854Updated 10 months ago
• Xilinx / SDAccel_Examples
  SDAccel Examples
  ☆359Updated 3 years ago
• Xilinx / CHaiDNN
  HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs
  ☆336Updated 6 years ago
• doonny / PipeCNN
  An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
  ☆1,365Updated 3 years ago