The Ultra-Low Power RISC-V Core
☆1,825Aug 6, 2025Updated 9 months ago
Alternatives and similar repositories for e203_hbirdv2
Users that are interested in e203_hbirdv2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,840Mar 24, 2021Updated 5 years ago
- OpenSource HummingBird RISC-V Software Development Kit☆173Dec 5, 2023Updated 2 years ago
- 32-bit Superscalar RISC-V CPU☆1,241Sep 18, 2021Updated 4 years ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,127Jun 27, 2024Updated last year
- RISC-V CPU Core (RV32IM)☆1,714Sep 18, 2021Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Open-source high-performance RISC-V processor☆6,996Updated this week
- IC design and development should be faster,simpler and more reliable☆1,992Dec 31, 2021Updated 4 years ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,546Apr 27, 2026Updated last week
- A very simple and easy to understand RISC-V core.☆1,464Nov 9, 2023Updated 2 years ago
- Must-have verilog systemverilog modules☆1,955Mar 12, 2026Updated last month
- OpenXuantie - OpenC910 Core☆1,430Jun 28, 2024Updated last year
- Rocket Chip Generator☆3,757Apr 21, 2026Updated 2 weeks ago
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,913Apr 30, 2026Updated last week
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,133Feb 11, 2026Updated 2 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- VeeR EH1 core☆938May 29, 2023Updated 2 years ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,566Apr 22, 2026Updated 2 weeks ago
- Verilog AXI components for FPGA implementation☆2,037Feb 27, 2025Updated last year
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,864Apr 14, 2026Updated 3 weeks ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, op…☆112Sep 17, 2022Updated 3 years ago
- A small, light weight, RISC CPU soft core☆1,532Dec 8, 2025Updated 5 months ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆896Updated this week
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,148Mar 11, 2026Updated last month
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,241Apr 29, 2026Updated last week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,223Apr 17, 2026Updated 3 weeks ago
- AMBA bus lecture material☆532Jan 21, 2020Updated 6 years ago
- RISC-V SoC designed by students in UCAS☆1,525Apr 28, 2026Updated last week
- RTL, Cmodel, and testbench for NVDLA☆2,072Mar 2, 2022Updated 4 years ago
- Chisel: A Modern Hardware Design Language☆4,650May 2, 2026Updated last week
- Simple RISC-V 3-stage Pipeline in Chisel☆608Aug 9, 2024Updated last year
- GNU toolchain for RISC-V, including GCC☆4,471Updated this week
- RISC-V Cores, SoC platforms and SoCs☆922Mar 26, 2021Updated 5 years ago
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆980Nov 15, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- SERV - The SErial RISC-V CPU☆1,793Feb 19, 2026Updated 2 months ago
- Verilator open-source SystemVerilog simulator and lint system☆3,587Updated this week
- RISC-V CPU Core☆426Jun 24, 2025Updated 10 months ago
- A DDR3 memory controller in Verilog for various FPGAs☆589Oct 10, 2021Updated 4 years ago
- RISC-V Debug Support for our PULP RISC-V Cores☆308Apr 1, 2026Updated last month
- 帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目☆5,418May 15, 2022Updated 3 years ago
- ☆2,005Updated this week