Alternatives and similar repositories for picorv32:

Users that are interested in picorv32 are comparing it to the libraries listed below

• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,699Updated last month
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,368Updated last month
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,247Updated this week
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,494Updated 3 weeks ago
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,514Updated last week
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆972Updated 3 years ago
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,398Updated 3 years ago
• openhwgroup / cva6
  The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
  ☆2,413Updated this week
• SpinalHDL / SpinalHDL
  Scala based HDL
  ☆1,750Updated this week
• aolofsson / oh
  Verilog library for ASIC and FPGA designers
  ☆1,261Updated 10 months ago
• YosysHQ / nextpnr
  nextpnr portable FPGA place and route tool
  ☆1,409Updated this week
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,847Updated this week
• olofk / fusesoc
  Package manager and build abstraction tool for FPGA/ASIC development
  ☆1,256Updated this week
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆919Updated 2 weeks ago
• openhwgroup / cv32e40p
  CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
  ☆1,028Updated last month
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆867Updated 3 years ago
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,441Updated 5 months ago
• stnolting / neorv32
  A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent …
  ☆1,702Updated this week
• trabucayre / openFPGALoader
  Universal utility for programming FPGA
  ☆1,285Updated this week
• cocotb / cocotb
  cocotb: Python-based chip (RTL) verification
  ☆1,922Updated this week
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆862Updated last year
• syntacore / scr1
  SCR1 is a high-quality open-source RISC-V MCU core in Verilog
  ☆904Updated 4 months ago
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,158Updated 2 years ago
• freechipsproject / chisel-bootcamp
  Generator Bootcamp Material: Learn Chisel the Right Way
  ☆1,016Updated 6 months ago
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,383Updated this week
• ultraembedded / cores
  Various HDL (Verilog) IP Cores
  ☆760Updated 3 years ago
• alexforencich / verilog-pcie
  Verilog PCI express components
  ☆1,247Updated 10 months ago
• chipsalliance / riscv-dv
  Random instruction generator for RISC-V processor verification
  ☆1,080Updated last month
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,792Updated this week
• alexforencich / verilog-axi
  Verilog AXI components for FPGA implementation
  ☆1,655Updated 3 weeks ago