openhwgroup / cva6

Related projects: ⓘ

• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,684Updated last month
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,338Updated this week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,419Updated last week
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,572Updated this week
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,075Updated this week
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆810Updated last year
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,268Updated 3 weeks ago
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,053Updated 2 months ago
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,199Updated 3 years ago
• sifive / freedom
  Source files for SiFive's Freedom platforms
  ☆1,107Updated 3 years ago
• openhwgroup / cv32e40p
  CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
  ☆926Updated 2 months ago
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,165Updated last week
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆840Updated 3 years ago
• chipsalliance / riscv-dv
  Random instruction generator for RISC-V processor verification
  ☆997Updated 3 weeks ago
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,141Updated last year
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆821Updated 3 years ago
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,135Updated 2 months ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆970Updated 2 weeks ago
• riscv-software-src / riscv-tests
  ☆873Updated last week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,375Updated 3 weeks ago
• pulp-platform / pulpino
  An open-source microcontroller system based on RISC-V
  ☆873Updated 7 months ago
• westerndigitalcorporation / swerv_eh1
  A directory of Western Digital’s RISC-V SweRV Cores
  ☆854Updated 4 years ago
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆2,448Updated this week
• ucb-bar / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆674Updated last month
• SpinalHDL / SpinalHDL
  Scala based HDL
  ☆1,613Updated this week
• PrincetonUniversity / openpiton
  The OpenPiton Platform
  ☆626Updated last month
• ucb-bar / chisel-tutorial
  chisel tutorial exercises and answers
  ☆688Updated 2 years ago
• jbush001 / NyuziProcessor
  GPGPU microprocessor architecture
  ☆1,985Updated 4 months ago
• syntacore / scr1
  SCR1 is a high-quality open-source RISC-V MCU core in Verilog
  ☆838Updated 4 months ago
• aolofsson / oh
  Verilog library for ASIC and FPGA designers
  ☆1,155Updated 4 months ago