Alternatives and similar repositories for rocket-chip

Users that are interested in rocket-chip are comparing it to the libraries listed below

• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,900Updated 3 weeks ago
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,860Updated this week
• chipsalliance / chisel
  Chisel: A Modern Hardware Design Language
  ☆4,279Updated this week
• openhwgroup / cva6
  The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
  ☆2,487Updated this week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,775Updated last month
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,506Updated 11 months ago
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,547Updated 2 weeks ago
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,508Updated 7 months ago
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,170Updated 2 years ago
• ucb-bar / chisel-tutorial
  chisel tutorial exercises and answers
  ☆728Updated 3 years ago
• freechipsproject / chisel-bootcamp
  Generator Bootcamp Material: Learn Chisel the Right Way
  ☆1,036Updated 8 months ago
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,462Updated 3 years ago
• SpinalHDL / SpinalHDL
  Scala based HDL
  ☆1,794Updated this week
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,328Updated last week
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,274Updated 11 months ago
• openhwgroup / cv32e40p
  CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
  ☆1,077Updated this week
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆881Updated 4 years ago
• ucb-bar / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆714Updated 2 months ago
• jbush001 / NyuziProcessor
  GPGPU microprocessor architecture
  ☆2,082Updated 6 months ago
• riscv-software-src / riscv-isa-sim
  Spike, a RISC-V ISA Simulator
  ☆2,707Updated last week
• SI-RISCV / e200_opensource
  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
  ☆2,719Updated 4 years ago
• chipsalliance / firrtl
  Flexible Intermediate Representation for RTL
  ☆741Updated 9 months ago
• schoeberl / chisel-book
  Digital Design with Chisel
  ☆837Updated 3 weeks ago
• chipsalliance / riscv-dv
  Random instruction generator for RISC-V processor verification
  ☆1,126Updated 3 months ago
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆878Updated 2 years ago
• firesim / firesim
  FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
  ☆928Updated this week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,589Updated 2 weeks ago
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆1,024Updated 3 years ago
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,409Updated 3 months ago
• pulp-platform / pulpino
  An open-source microcontroller system based on RISC-V
  ☆956Updated last year