chipsalliance / rocket-chipLinks
Rocket Chip Generator
☆3,646Updated 3 months ago
Alternatives and similar repositories for rocket-chip
Users that are interested in rocket-chip are comparing it to the libraries listed below
Sorting:
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,040Updated 3 weeks ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,075Updated last week
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,733Updated this week
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,951Updated last week
- Chisel: A Modern Hardware Design Language☆4,517Updated this week
- Scala based HDL☆1,897Updated this week
- RISC-V Tools (ISA Simulator and Tests)☆1,172Updated 3 years ago
- Generator Bootcamp Material: Learn Chisel the Right Way☆1,095Updated last year
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,856Updated last year
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,712Updated this week
- chisel tutorial exercises and answers☆739Updated 3 years ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,456Updated 5 months ago
- Spike, a RISC-V ISA Simulator☆2,969Updated this week
- educational microarchitectures for risc-v isa☆727Updated 3 months ago
- RISC-V Cores, SoC platforms and SoCs☆907Updated 4 years ago
- ☆1,093Updated 3 weeks ago
- Digital Design with Chisel☆885Updated last month
- Random instruction generator for RISC-V processor verification☆1,227Updated 2 months ago
- RISC-V CPU Core (RV32IM)☆1,601Updated 4 years ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,153Updated 7 months ago
- A small, light weight, RISC CPU soft core☆1,490Updated 2 weeks ago
- An open-source microcontroller system based on RISC-V☆997Updated last year
- OpenXuantie - OpenC910 Core☆1,362Updated last year
- 32-bit Superscalar RISC-V CPU☆1,154Updated 4 years ago
- VeeR EH1 core☆915Updated 2 years ago
- The Ultra-Low Power RISC-V Core☆1,675Updated 4 months ago
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,795Updated 4 years ago
- Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro☆1,031Updated 3 weeks ago
- SERV - The SErial RISC-V CPU☆1,711Updated last week
- Flexible Intermediate Representation for RTL☆749Updated last year