Verilog AXI components for FPGA implementation
☆2,037Feb 27, 2025Updated last year
Alternatives and similar repositories for verilog-axi
Users that are interested in verilog-axi are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Verilog AXI stream components for FPGA implementation☆886Feb 27, 2025Updated last year
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,566Apr 22, 2026Updated 2 weeks ago
- Verilog PCI express components☆1,595Apr 26, 2024Updated 2 years ago
- Verilog Ethernet components for FPGA implementation☆2,947Feb 27, 2025Updated last year
- Must-have verilog systemverilog modules☆1,955Mar 12, 2026Updated last month
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Bus bridges and other odds and ends☆663Mar 10, 2026Updated last month
- Verilog UART☆561Feb 27, 2025Updated last year
- AMBA bus lecture material☆532Jan 21, 2020Updated 6 years ago
- AMBA AXI VIP☆457Jun 28, 2024Updated last year
- Verilog I2C interface for FPGA implementation☆698Feb 27, 2025Updated last year
- AXI interface modules for Cocotb☆329Mar 13, 2026Updated last month
- HDL libraries and projects☆1,913Updated this week
- Open source FPGA-based NIC and platform for in-network compute☆2,293Jul 5, 2024Updated last year
- Verilog library for ASIC and FPGA designers☆1,412May 8, 2024Updated 2 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- AXI DMA 32 / 64 bits☆127Jul 17, 2014Updated 11 years ago
- Common SystemVerilog components☆743Updated this week
- Various HDL (Verilog) IP Cores☆897Jul 1, 2021Updated 4 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆589Oct 10, 2021Updated 4 years ago
- cocotb: Python-based chip (RTL) verification☆2,354Apr 27, 2026Updated last week
- AXI, AXI stream, Ethernet, and PCIe components in System Verilog☆739Apr 7, 2026Updated last month
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,127Jun 27, 2024Updated last year
- The RIFFA development repository☆870Jun 11, 2024Updated last year
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆449Feb 13, 2026Updated 2 months ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- RTL, Cmodel, and testbench for NVDLA☆2,072Mar 2, 2022Updated 4 years ago
- The Ultra-Low Power RISC-V Core☆1,825Aug 6, 2025Updated 9 months ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆245Jul 16, 2023Updated 2 years ago
- AXI Interconnect☆56Aug 20, 2021Updated 4 years ago
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,913Apr 30, 2026Updated last week
- synthesiseable ieee 754 floating point library in verilog☆736Mar 13, 2023Updated 3 years ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,864Apr 14, 2026Updated 3 weeks ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,546Apr 27, 2026Updated last week
- An AXI4 crossbar implementation in SystemVerilog☆225Updated this week
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- UART -> AXI Bridge☆74Jul 1, 2021Updated 4 years ago
- A small, light weight, RISC CPU soft core☆1,532Dec 8, 2025Updated 5 months ago
- AXI总线连接器☆105Mar 26, 2020Updated 6 years ago
- Verilog digital signal processing components☆176Oct 30, 2022Updated 3 years ago
- 32-bit Superscalar RISC-V CPU☆1,241Sep 18, 2021Updated 4 years ago
- PCI express simulation framework for Cocotb☆203Sep 8, 2025Updated 8 months ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,133Feb 11, 2026Updated 2 months ago