darklife / darkriscvLinks
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
☆2,362Updated last week
Alternatives and similar repositories for darkriscv
Users that are interested in darkriscv are comparing it to the libraries listed below
Sorting:
- A small, light weight, RISC CPU soft core☆1,423Updated 5 months ago
- The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux☆2,540Updated last week
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,812Updated last week
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,569Updated last year
- SERV - The SErial RISC-V CPU☆1,611Updated last month
- RISC-V CPU Core (RV32IM)☆1,496Updated 3 years ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,575Updated last week
- 32-bit Superscalar RISC-V CPU☆1,053Updated 3 years ago
- SonicBOOM: The Berkeley Out-of-Order Machine☆1,930Updated 2 months ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,086Updated last month
- Verilog library for ASIC and FPGA designers☆1,309Updated last year
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,089Updated 4 months ago
- RISC-V Cores, SoC platforms and SoCs☆893Updated 4 years ago
- VeeR EH1 core☆884Updated 2 years ago
- Scala based HDL☆1,819Updated this week
- Random instruction generator for RISC-V processor verification☆1,136Updated last month
- ☆1,033Updated 3 weeks ago
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆668Updated 2 weeks ago
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆1,797Updated last week
- An open-source microcontroller system based on RISC-V☆965Updated last year
- Package manager and build abstraction tool for FPGA/ASIC development☆1,307Updated 3 weeks ago
- GPGPU microprocessor architecture☆2,095Updated 8 months ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆1,893Updated this week
- cocotb: Python-based chip (RTL) verification☆2,021Updated last week
- RISC-V Tools (ISA Simulator and Tests)☆1,170Updated 2 years ago
- OpenXuantie - OpenC910 Core☆1,287Updated last year
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆924Updated 7 months ago
- educational microarchitectures for risc-v isa☆716Updated 4 months ago
- The Ultra-Low Power RISC-V Core☆1,540Updated 9 months ago
- Rocket Chip Generator☆3,489Updated last month