OpenXiangShan / XiangShanLinks
Open-source high-performance RISC-V processor
☆6,802Updated this week
Alternatives and similar repositories for XiangShan
Users that are interested in XiangShan are comparing it to the libraries listed below
Sorting:
- RISC-V SoC designed by students in UCAS☆1,494Updated last week
- Chisel: A Modern Hardware Design Language☆4,510Updated this week
- Rocket Chip Generator☆3,646Updated 3 months ago
- Spike, a RISC-V ISA Simulator☆2,961Updated last week
- IC design and development should be faster,simpler and more reliable☆1,975Updated 3 years ago
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,035Updated 2 weeks ago
- RISC-V Instruction Set Manual☆4,402Updated last week
- OpenXuantie - OpenC910 Core☆1,359Updated last year
- ☆1,818Updated last week
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,792Updated 4 years ago
- The Ultra-Low Power RISC-V Core☆1,675Updated 4 months ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,947Updated last week
- GNU toolchain for RISC-V, including GCC☆4,280Updated last week
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,075Updated this week
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,727Updated 2 weeks ago
- OpenTitan: Open source silicon root of trust☆3,066Updated this week
- Verilator open-source SystemVerilog simulator and lint system☆3,244Updated this week
- OpenSource GPU, in Verilog, loosely based on RISC-V ISA☆1,146Updated last year
- Documentation for XiangShan☆427Updated this week
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,456Updated 5 months ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,837Updated last year
- A very simple and easy to understand RISC-V core.☆1,345Updated 2 years ago
- A minimal GPU design in Verilog to learn how GPUs work from the ground up☆8,993Updated last year
- Working draft of the proposed RISC-V V vector extension☆1,057Updated last year
- RISC-V Tools (ISA Simulator and Tests)☆1,171Updated 3 years ago
- RISC-V CPU Core (RV32IM)☆1,601Updated 4 years ago
- Build your hardware, easily!☆3,645Updated this week
- GPGPU microprocessor architecture☆2,162Updated last year
- The official repository for the gem5 computer-system architecture simulator.☆2,339Updated this week
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆854Updated last week