Alternatives and similar repositories for XiangShan

Users that are interested in XiangShan are comparing it to the libraries listed below

• OSCPU / NutShell
  RISC-V SoC designed by students in UCAS
  ☆1,453Updated 4 months ago
• chipsalliance / chisel
  Chisel: A Modern Hardware Design Language
  ☆4,265Updated this week
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,437Updated 3 weeks ago
• riscv-software-src / riscv-isa-sim
  Spike, a RISC-V ISA Simulator
  ☆2,685Updated 2 weeks ago
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,886Updated last week
• openhwgroup / cva6
  The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
  ☆2,459Updated this week
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,836Updated last week
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆2,868Updated this week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,756Updated 2 weeks ago
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,299Updated last week
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,265Updated 10 months ago
• riscv-collab / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC
  ☆3,900Updated this week
• XUANTIE-RV / wujian100_open
  IC design and development should be faster，simpler and more reliable
  ☆1,927Updated 3 years ago
• riscvarchive / riscv-v-spec
  Working draft of the proposed RISC-V V vector extension
  ☆1,028Updated last year
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,473Updated 10 months ago
• llvm / circt
  Circuit IR Compilers and Tools
  ☆1,807Updated this week
• SI-RISCV / e200_opensource
  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
  ☆2,713Updated 4 years ago
• vortexgpgpu / vortex
  ☆1,499Updated this week
• SpinalHDL / SpinalHDL
  Scala based HDL
  ☆1,781Updated this week
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,486Updated 7 months ago
• riscv / riscv-isa-manual
  RISC-V Instruction Set Manual
  ☆4,054Updated this week
• liangkangnan / tinyriscv
  A very simple and easy to understand RISC-V core.
  ☆1,227Updated last year
• OpenXiangShan / XiangShan-doc
  Documentation for XiangShan
  ☆413Updated this week
• jbush001 / NyuziProcessor
  GPGPU microprocessor architecture
  ☆2,074Updated 6 months ago
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,165Updated 2 years ago
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,436Updated 3 years ago
• hughperkins / VeriGPU
  OpenSource GPU, in Verilog, loosely based on RISC-V ISA
  ☆992Updated 5 months ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,075Updated 2 months ago
• enjoy-digital / litex
  Build your hardware, easily!
  ☆3,299Updated this week
• YosysHQ / yosys
  Yosys Open SYnthesis Suite
  ☆3,798Updated this week