Open-source high-performance RISC-V processor
☆6,915Mar 23, 2026Updated this week
Alternatives and similar repositories for XiangShan
Users that are interested in XiangShan are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Documentation for XiangShan☆434Mar 19, 2026Updated last week
- Chisel: A Modern Hardware Design Language☆4,615Updated this week
- Rocket Chip Generator☆3,730Feb 25, 2026Updated last month
- RISC-V SoC designed by students in UCAS☆1,516Jan 14, 2026Updated 2 months ago
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,111Mar 11, 2026Updated 2 weeks ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click and start building anything your business needs.
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,183Mar 17, 2026Updated last week
- OpenXuantie - OpenC910 Core☆1,401Jun 28, 2024Updated last year
- The Ultra-Low Power RISC-V Core☆1,787Aug 6, 2025Updated 7 months ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆877Mar 16, 2026Updated last week
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,851Updated this week
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,827Mar 24, 2021Updated 5 years ago
- Digital Design with Chisel☆900Mar 19, 2026Updated last week
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,075Feb 11, 2026Updated last month
- Verilator open-source SystemVerilog simulator and lint system☆3,468Updated this week
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- RISC-V Instruction Set Manual☆4,542Updated this week
- Simple RISC-V 3-stage Pipeline in Chisel☆604Aug 9, 2024Updated last year
- ☆1,939Updated this week
- Generator Bootcamp Material: Learn Chisel the Right Way☆1,121Sep 10, 2024Updated last year
- IC design and development should be faster，simpler and more reliable☆1,986Dec 31, 2021Updated 4 years ago
- Super fast RISC-V ISA emulator for XiangShan processor☆316Updated this week
- Spike, a RISC-V ISA Simulator☆3,045Mar 19, 2026Updated last week
- GNU toolchain for RISC-V, including GCC☆4,409Mar 13, 2026Updated last week
- A template project for beginning new Chisel work☆695Feb 24, 2026Updated last month
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- VeeR EH1 core☆931May 29, 2023Updated 2 years ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,044Jun 27, 2024Updated last year
- How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design☆630Aug 13, 2024Updated last year
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,804Feb 17, 2026Updated last month
- Modern co-simulation framework for RISC-V CPUs☆174Updated this week
- The official repository for the gem5 computer-system architecture simulator.☆2,527Updated this week
- Scala based HDL☆1,935Mar 16, 2026Updated last week
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,528Mar 18, 2026Updated last week
- 32-bit Superscalar RISC-V CPU☆1,197Sep 18, 2021Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,511Jan 7, 2026Updated 2 months ago
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,157Feb 21, 2026Updated last month
- Random instruction generator for RISC-V processor verification☆1,265Mar 5, 2026Updated 3 weeks ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, op…☆113Sep 17, 2022Updated 3 years ago
- OpenTitan: Open source silicon root of trust☆3,252Updated this week
- Circuit IR Compilers and Tools☆2,071Updated this week
- Berkeley's Spatial Array Generator☆1,251Mar 19, 2026Updated last week