ultraembedded / riscvLinks
RISC-V CPU Core (RV32IM)
☆1,462Updated 3 years ago
Alternatives and similar repositories for riscv
Users that are interested in riscv are comparing it to the libraries listed below
Sorting:
- 32-bit Superscalar RISC-V CPU☆1,024Updated 3 years ago
- The Ultra-Low Power RISC-V Core☆1,508Updated 7 months ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,077Updated this week
- VeeR EH1 core☆878Updated 2 years ago
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,547Updated 2 weeks ago
- Random instruction generator for RISC-V processor verification☆1,126Updated 3 months ago
- RISC-V Cores, SoC platforms and SoCs☆881Updated 4 years ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,775Updated last month
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆1,860Updated this week
- Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro☆955Updated last month
- SERV - The SErial RISC-V CPU☆1,589Updated 2 weeks ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,506Updated 11 months ago
- ☆1,011Updated last month
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆914Updated 6 months ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,286Updated this week
- A small, light weight, RISC CPU soft core☆1,409Updated 3 months ago
- The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux☆2,487Updated this week
- Generator Bootcamp Material: Learn Chisel the Right Way☆1,036Updated 8 months ago
- SonicBOOM: The Berkeley Out-of-Order Machine☆1,900Updated 3 weeks ago
- educational microarchitectures for risc-v isa☆714Updated 2 months ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,328Updated last week
- Simple RISC-V 3-stage Pipeline in Chisel☆578Updated 9 months ago
- Digital Design with Chisel☆837Updated 3 weeks ago
- OpenXuantie - OpenC910 Core☆1,274Updated 11 months ago
- Verilog AXI components for FPGA implementation☆1,724Updated 3 months ago
- RISC-V Tools (ISA Simulator and Tests)☆1,170Updated 2 years ago
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆667Updated 6 months ago
- A Linux-capable RISC-V multicore for and by the world☆701Updated last month
- Verilog library for ASIC and FPGA designers☆1,289Updated last year
- ☆564Updated 2 weeks ago