ZipCPU / zipcpuLinks
A small, light weight, RISC CPU soft core
☆1,480Updated 3 months ago
Alternatives and similar repositories for zipcpu
Users that are interested in zipcpu are comparing it to the libraries listed below
Sorting:
- SERV - The SErial RISC-V CPU☆1,701Updated last month
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,920Updated last month
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,444Updated 4 months ago
- Verilog library for ASIC and FPGA designers☆1,363Updated last year
- VeeR EH1 core☆912Updated 2 years ago
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,144Updated 6 months ago
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,697Updated this week
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,686Updated last week
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆676Updated 4 months ago
- 32-bit Superscalar RISC-V CPU☆1,133Updated 4 years ago
- RISC-V Cores, SoC platforms and SoCs☆905Updated 4 years ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,367Updated this week
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆942Updated last year
- mor1kx - an OpenRISC 1000 processor IP core☆566Updated 3 months ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,800Updated last year
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,127Updated last month
- RISC-V CPU Core (RV32IM)☆1,589Updated 4 years ago
- An open-source microcontroller system based on RISC-V☆992Updated last year
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,019Updated 6 months ago
- Random instruction generator for RISC-V processor verification☆1,206Updated 2 months ago
- The OpenPiton Platform☆746Updated 2 months ago
- Scala based HDL☆1,889Updated last week
- A directory of Western Digital’s RISC-V SweRV Cores☆875Updated 5 years ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,414Updated last week
- A Linux-capable RISC-V multicore for and by the world☆748Updated 3 weeks ago
- Linux on LiteX-VexRiscv☆666Updated 2 months ago
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆1,918Updated last week
- educational microarchitectures for risc-v isa☆726Updated 3 months ago
- nextpnr portable FPGA place and route tool☆1,561Updated this week
- cocotb: Python-based chip (RTL) verification☆2,161Updated last week