A very simple and easy to understand RISC-V core.
☆1,511Nov 9, 2023Updated 2 years ago
Alternatives and similar repositories for tinyriscv
Users that are interested in tinyriscv are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The Ultra-Low Power RISC-V Core☆1,905Aug 6, 2025Updated last year
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,851Mar 24, 2021Updated 5 years ago
- RISC-V CPU Core (RV32IM)☆1,771Sep 18, 2021Updated 4 years ago
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,366Jul 31, 2026Updated 3 weeks ago
- 32-bit Superscalar RISC-V CPU☆1,296Sep 18, 2021Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Open-source high-performance RISC-V processor☆7,224Updated this week
- IC design and development should be faster，simpler and more reliable☆2,013Dec 31, 2021Updated 4 years ago
- Must-have verilog systemverilog modules☆2,015Mar 12, 2026Updated 5 months ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,601May 12, 2026Updated 3 months ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,232Feb 11, 2026Updated 6 months ago
- RISC-V SoC designed by students in UCAS☆1,545Aug 18, 2026Updated last week
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆940Aug 18, 2026Updated last week
- Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)☆2,029Aug 20, 2026Updated last week
- Rocket Chip Generator☆3,852Jun 2, 2026Updated 2 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆3,086Updated this week
- Verilog AXI components for FPGA implementation☆2,121Feb 27, 2025Updated last year
- 帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目☆5,665May 15, 2022Updated 4 years ago
- OpenXuantie - OpenC910 Core☆1,471Jun 28, 2024Updated 2 years ago
- A graphical processor simulator and assembly editor for the RISC-V ISA☆3,390Aug 18, 2026Updated last week
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,278Updated this week
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,369Aug 19, 2026Updated last week
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,226Updated this week
- RISC-V CPU simulator for education purposes☆629Aug 14, 2026Updated 2 weeks ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Simple RISC-V 3-stage Pipeline in Chisel☆619Aug 9, 2024Updated 2 years ago
- Chisel: A Modern Hardware Design Language☆4,764Updated this week
- verilog实现TPU中的脉动阵列计算卷积的module☆175May 10, 2025Updated last year
- An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC，包含一个RV32I CPU、一个简单可扩展的总线、一些外设。☆439Sep 14, 2023Updated 2 years ago
- 一篇全面的 Bluespec SystemVerilog (BSV) 中文教程，介绍了BSV的调度、FIFO数据流、多态等高级特性，展示了BSV相比于传统Verilog开发的优势。☆612Sep 15, 2023Updated 2 years ago
- AMBA bus lecture material☆552Jan 21, 2020Updated 6 years ago
- VeeR EH1 core☆964Jul 16, 2026Updated last month
- An embed RISC-V Core with RV32IMZicsr ISA named SparrowRV.☆80Jan 15, 2023Updated 3 years ago
- 数字IC相关资料☆1,582Jul 1, 2025Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design☆667Aug 13, 2024Updated 2 years ago
- SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.☆236Aug 25, 2020Updated 6 years ago
- RISC-V CPU Core☆445Jun 24, 2025Updated last year
- GNU toolchain for RISC-V, including GCC☆4,595Updated this week
- PulseRain Reindeer - RISCV RV32I[M] Soft CPU☆127Aug 28, 2019Updated 7 years ago
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆999Nov 15, 2024Updated last year
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,668Updated this week