Alternatives and similar repositories for riscv-gnu-toolchain

Users that are interested in riscv-gnu-toolchain are comparing it to the libraries listed below

• riscv-software-src / riscv-isa-sim
  Spike, a RISC-V ISA Simulator
  ☆2,711Updated last week
• riscv / riscv-isa-manual
  RISC-V Instruction Set Manual
  ☆4,099Updated this week
• riscv-software-src / opensbi
  RISC-V Open Source Supervisor Binary Interface
  ☆1,204Updated last week
• riscv-non-isa / riscv-asm-manual
  RISC-V Assembly Programmer's Manual
  ☆1,514Updated 3 weeks ago
• riscv-software-src / riscv-tools
  RISC-V Tools (ISA Simulator and Tests)
  ☆1,170Updated 2 years ago
• chipsalliance / rocket-chip
  Rocket Chip Generator
  ☆3,451Updated this week
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,462Updated 3 years ago
• YosysHQ / picorv32
  PicoRV32 - A Size-Optimized RISC-V CPU
  ☆3,506Updated 11 months ago
• verilator / verilator
  Verilator open-source SystemVerilog simulator and lint system
  ☆2,925Updated this week
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆636Updated last month
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,775Updated last month
• riscv-software-src / riscv-tests
  ☆1,014Updated last month
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆781Updated 3 weeks ago
• darklife / darkriscv
  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
  ☆2,328Updated last week
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,900Updated 3 weeks ago
• riscv / riscv-opcodes
  RISC-V Opcodes
  ☆766Updated 3 weeks ago
• steveicarus / iverilog
  Icarus Verilog
  ☆3,061Updated 3 weeks ago
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,860Updated this week
• riscvarchive / riscv-v-spec
  Working draft of the proposed RISC-V V vector extension
  ☆1,029Updated last year
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,508Updated 7 months ago
• openhwgroup / cva6
  The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
  ☆2,487Updated this week
• chipsalliance / chisel
  Chisel: A Modern Hardware Design Language
  ☆4,279Updated this week
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆881Updated 4 years ago
• SI-RISCV / e200_opensource
  Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2
  ☆2,719Updated 4 years ago
• jameslzhu / riscv-card
  An unofficial assembly reference for RISC-V.
  ☆488Updated 6 months ago
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,274Updated 11 months ago
• eugene-tarassov / vivado-risc-v
  Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
  ☆957Updated last month
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,547Updated 2 weeks ago
• YosysHQ / yosys
  Yosys Open SYnthesis Suite
  ☆3,832Updated this week
• riscv-non-isa / riscv-sbi-doc
  Documentation for the RISC-V Supervisor Binary Interface
  ☆406Updated 3 weeks ago