OpenXuantie - OpenC910 Core
☆1,488Jun 28, 2024Updated 2 years ago
Alternatives and similar repositories for openc910
Users that are interested in openc910 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- OpenXuantie - OpenC906 Core☆425Jun 28, 2024Updated 2 years ago
- OpenXuantie - OpenE906 Core☆180Jun 28, 2024Updated 2 years ago
- Open-source high-performance RISC-V processor☆7,357Updated this week
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,274Oct 8, 2026Updated 3 weeks ago
- OpenXuantie - OpenE902 Core☆180Jun 28, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆3,178Updated this week
- The Ultra-Low Power RISC-V Core☆1,964Sep 25, 2026Updated last month
- Rocket Chip Generator☆3,894Sep 13, 2026Updated last month
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆970Updated this week
- ☆2,364Updated this week
- IC design and development should be faster，simpler and more reliable☆2,031Dec 31, 2021Updated 4 years ago
- VeeR EH1 core☆971Jul 16, 2026Updated 3 months ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,442Updated this week
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆560Oct 16, 2026Updated 2 weeks ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 32-bit Superscalar RISC-V CPU☆1,324Sep 18, 2021Updated 5 years ago
- Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2☆2,854Mar 24, 2021Updated 5 years ago
- Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)☆2,142Updated this week
- VeeR EH2 core☆283Oct 6, 2026Updated 3 weeks ago
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,213Updated this week
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,739Updated this week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆647Sep 14, 2026Updated last month
- Chisel: A Modern Hardware Design Language☆4,825Updated this week
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,317Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆256Jun 25, 2025Updated last year
- Spike, a RISC-V ISA Simulator☆3,267Updated this week
- Documentation for XiangShan☆448Updated this week
- RTL, Cmodel, and testbench for NVDLA☆2,194Mar 2, 2022Updated 4 years ago
- The OpenPiton Platform☆837Updated this week
- A Linux-capable RISC-V multicore for and by the world☆838Updated this week
- ☆1,258Oct 19, 2026Updated last week
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,301Oct 13, 2026Updated 2 weeks ago
- Verilog AXI components for FPGA implementation☆2,167Feb 27, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- OpenTitan: Open source silicon root of trust☆3,723Updated this week
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,395Sep 7, 2026Updated last month
- Random instruction generator for RISC-V processor verification☆1,373Updated this week
- This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain a…☆572Nov 26, 2024Updated last year
- Functional verification project for the CORE-V family of RISC-V cores.☆735Updated this week
- Berkeley's Spatial Array Generator☆1,540Updated this week
- VeeR EL2 Core☆349Updated this week