☆2,353Oct 27, 2026Updated this week
Alternatives and similar repositories for vortex
Users that are interested in vortex are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆244Aug 22, 2026Updated 2 months ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆968Updated this week
- OpenSource GPU, in Verilog, loosely based on RISC-V ISA☆1,399Nov 22, 2024Updated last year
- GPGPU microprocessor architecture☆2,230Nov 8, 2024Updated last year
- An open source GPU based off of the AMD Southern Islands ISA.☆1,430Aug 18, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆3,171Updated this week
- Berkeley's Spatial Array Generator☆1,534Updated this week
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,438Oct 17, 2026Updated last week
- GPGPU supporting RISCV-V, developed with verilog HDL☆172Feb 24, 2025Updated last year
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,214Updated this week
- GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for…☆1,759Oct 3, 2026Updated 3 weeks ago
- OpenXuantie - OpenC910 Core☆1,485Jun 28, 2024Updated 2 years ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆647Sep 14, 2026Updated last month
- Open-source high-performance RISC-V processor☆7,352Updated this week
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Vortex Graphics☆101Oct 2, 2024Updated 2 years ago
- RTL, Cmodel, and testbench for NVDLA☆2,194Mar 2, 2022Updated 4 years ago
- A Linux-capable RISC-V multicore for and by the world☆839Oct 14, 2026Updated 2 weeks ago
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,271Oct 8, 2026Updated 2 weeks ago
- A machine learning accelerator core designed for energy-efficient AI at the edge.☆2,626Updated this week
- This is the top-level repository for the Accel-Sim framework.☆721Updated this week
- 32-bit Superscalar RISC-V CPU☆1,325Sep 18, 2021Updated 5 years ago
- Rocket Chip Generator☆3,892Sep 13, 2026Updated last month
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,392Sep 7, 2026Updated last month
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,300Oct 13, 2026Updated 2 weeks ago
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆124May 11, 2023Updated 3 years ago
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆559Oct 16, 2026Updated last week
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,738Sep 24, 2026Updated last month
- The OpenPiton Platform☆836Feb 25, 2026Updated 8 months ago
- Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)☆2,135Updated this week
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆1,317Oct 20, 2026Updated last week
- A highly-flexible GPU simulator for AMD GPUs.☆275Updated this week
- Chisel: A Modern Hardware Design Language☆4,821Updated this week
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- VeeR EH1 core☆970Jul 16, 2026Updated 3 months ago
- A minimal GPU design in Verilog to learn how GPUs work from the ground up☆13,141Aug 18, 2024Updated 2 years ago
- BaseJump STL: A Standard Template Library for SystemVerilog☆691Updated this week
- Tile based architecture designed for computing efficiency, scalability and generality☆303Sep 20, 2026Updated last month
- The Ultra-Low Power RISC-V Core☆1,956Sep 25, 2026Updated last month
- Verilator open-source SystemVerilog simulator and lint system☆4,036Updated this week
- Yosys Open SYnthesis Suite☆4,850Updated this week