Alternatives and similar repositories for vortex

Users that are interested in vortex are comparing it to the libraries listed below

• hughperkins / VeriGPU
  OpenSource GPU, in Verilog, loosely based on RISC-V ISA
  ☆1,106Updated 11 months ago
• ucb-bar / chipyard
  An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
  ☆1,999Updated 2 weeks ago
• XUANTIE-RV / openc910
  OpenXuantie - OpenC910 Core
  ☆1,335Updated last year
• riscv-boom / riscv-boom
  SonicBOOM: The Berkeley Out-of-Order Machine
  ☆1,987Updated 5 months ago
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,111Updated last week
• jbush001 / NyuziProcessor
  GPGPU microprocessor architecture
  ☆2,131Updated 11 months ago
• riscvarchive / riscv-v-spec
  Working draft of the proposed RISC-V V vector extension
  ☆1,045Updated last year
• THU-DSP-LAB / ventus-gpgpu
  GPGPU processor supporting RISCV-V extension, developed with Chisel HDL
  ☆816Updated this week
• chipsalliance / Cores-VeeR-EH1
  VeeR EH1 core
  ☆901Updated 2 years ago
• VerticalResearchGroup / miaow
  An open source GPU based off of the AMD Southern Islands ISA.
  ☆1,246Updated 2 months ago
• PrincetonUniversity / openpiton
  The OpenPiton Platform
  ☆732Updated last month
• black-parrot / black-parrot
  A Linux-capable RISC-V multicore for and by the world
  ☆741Updated 2 weeks ago
• ultraembedded / biriscv
  32-bit Superscalar RISC-V CPU
  ☆1,106Updated 4 years ago
• openhwgroup / cv32e40p
  CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
  ☆1,130Updated 4 months ago
• lowRISC / ibex
  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
  ☆1,646Updated last month
• openhwgroup / cva6
  The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…
  ☆2,649Updated this week
• chipsalliance / riscv-dv
  Random instruction generator for RISC-V processor verification
  ☆1,180Updated 3 weeks ago
• riscv-software-src / riscv-tests
  ☆1,069Updated last week
• riscvarchive / riscv-cores-list
  RISC-V Cores, SoC platforms and SoCs
  ☆897Updated 4 years ago
• schoeberl / chisel-book
  Digital Design with Chisel
  ☆863Updated last week
• ucb-bar / gemmini
  Berkeley's Spatial Array Generator
  ☆1,078Updated last week
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,468Updated 2 months ago
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,659Updated last week
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,897Updated this week
• ultraembedded / riscv
  RISC-V CPU Core (RV32IM)
  ☆1,554Updated 4 years ago
• freechipsproject / chisel-bootcamp
  Generator Bootcamp Material: Learn Chisel the Right Way
  ☆1,069Updated last year
• VLSIDA / OpenRAM
  An open-source static random access memory (SRAM) compiler.
  ☆957Updated last week
• ucb-bar / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆720Updated last month
• pulp-platform / ara
  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …
  ☆466Updated 2 months ago
• OpenXiangShan / XiangShan-doc
  Documentation for XiangShan
  ☆426Updated this week