Alternatives and similar repositories for benchmarks:

Users that are interested in benchmarks are comparing it to the libraries listed below

• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆140Updated last week
• nbulsi / also
  A logic synthesis tool
  ☆73Updated last month
• lsils / mockturtle
  C++ logic network library
  ☆229Updated this week
• lnis-uofu / LSOracle
  IDEA project source files
  ☆106Updated 6 months ago
• lsils / lstools-showcase
  Showcase examples for EPFL logic synthesis libraries
  ☆194Updated last year
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆125Updated 6 months ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆45Updated 3 months ago
• panhomyoung / phyLS
  A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…
  ☆26Updated last week
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆125Updated 9 months ago
• The-OpenROAD-Project / asap7
  ☆155Updated last month
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆102Updated last year
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆157Updated 4 months ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆55Updated last week
• wjrforcyber / ABCPaperCheck
  Research paper based on or related to ABC.
  ☆36Updated this week
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆81Updated 9 months ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆133Updated 2 years ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆133Updated 2 years ago
• mflowgen / freepdk-45nm
  ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
  ☆171Updated 5 years ago
• cuhk-eda / Xplace
  Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization
  ☆121Updated 4 months ago
• mflowgen / mflowgen
  mflowgen -- A Modular ASIC/FPGA Flow Generator
  ☆249Updated 2 months ago
• jpsety / verilog_benchmark_circuits
  EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
  ☆27Updated 5 years ago
• NTU-LaDS-II / FAN_ATPG
  FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
  ☆86Updated last year
• The-OpenROAD-Project / OpenSTA
  OpenSTA engine
  ☆459Updated this week
• ncsu-eda / FreePDK3
  ☆142Updated 3 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆85Updated 4 years ago
• bluesceada / iscas89_hl_verilog
  Re-host of ISCAS89 sequential benchmark circuits in higher level verilog (without "DFF")
  ☆14Updated 3 years ago
• pkuzjx / eda-collection
  ☆105Updated 5 years ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆38Updated last year
• pkuzjx / EDA-wiki
  EDA wiki
  ☆125Updated last month
• The-OpenROAD-Project / RePlAce
  RePlAce global placement tool
  ☆232Updated 4 years ago