panhomyoung / phySATLinks
Semi-Tenser Product based SAT and AllSAT solver, where it can solve CNF and circuit input.
☆16Updated last year
Alternatives and similar repositories for phySAT
Users that are interested in phySAT are comparing it to the libraries listed below
Sorting:
- Awesome machine learning for logic synthesis☆28Updated 2 years ago
- ☆16Updated 4 years ago
- ☆11Updated 2 years ago
- ☆18Updated 2 years ago
- GPU-based logic synthesis tool☆81Updated this week
- ☆15Updated 7 years ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆33Updated 11 months ago
- Collection of digital hardware modules & projects (benchmarks)☆59Updated last month
- Routing Visualization for Physical Design☆19Updated 6 years ago
- GOMIL: Global Optimization of Multiplier by Integer Linear Programming☆13Updated 3 years ago
- ☆15Updated 2 years ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆19Updated 2 months ago
- Optimal gate sizing of digital circuits using geometric programming☆11Updated 8 years ago
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆19Updated 6 months ago
- Simple Python interface for ABC☆23Updated 2 years ago
- The release for paper "Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs"☆13Updated 8 months ago
- Research paper based on or related to ABC.☆44Updated 3 weeks ago
- ☆25Updated last year
- ☆22Updated last year
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆50Updated 5 months ago
- ☆29Updated last year
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆23Updated 3 years ago
- MLCAD 2020: Reinforcement for logic optimization sequence exploration☆28Updated 4 years ago
- The ANUBIS benchmark suite for Incremental Synthesis☆12Updated 4 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆50Updated 5 months ago
- OpenDesign Flow Database☆16Updated 6 years ago
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆28Updated this week
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆27Updated 5 years ago
- Benchmarks for Approximate Circuit Synthesis☆16Updated 4 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆18Updated 4 years ago