A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Verification""
☆42Apr 10, 2026Updated 3 weeks ago
Alternatives and similar repositories for phyLS
Users that are interested in phyLS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆27Apr 9, 2025Updated last year
- Semi-Tenser Product based SAT and AllSAT solver, where it can solve CNF and circuit input.☆17Aug 2, 2023Updated 2 years ago
- C++ logic network library☆289Updated this week
- GPU-based logic synthesis tool☆102Mar 31, 2026Updated last month
- Research paper based on or related to ABC.☆72Jan 19, 2026Updated 3 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆42Jul 17, 2024Updated last year
- ☆13Dec 31, 2022Updated 3 years ago
- ☆19Dec 21, 2020Updated 5 years ago
- ☆18Apr 19, 2026Updated last week
- IDEA project source files☆112Apr 15, 2026Updated 2 weeks ago
- Showcase examples for EPFL logic synthesis libraries☆205Apr 5, 2024Updated 2 years ago
- A logic synthesis tool☆88Apr 20, 2026Updated last week
- C++ header-only exact synthesis library☆18Jan 18, 2023Updated 3 years ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆24May 24, 2025Updated 11 months ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- EPFL logic synthesis benchmarks☆244Mar 3, 2026Updated last month
- ABC: System for Sequential Logic Synthesis and Formal Verification☆1,160Updated this week
- Problems and Results of IWLS 2023 Programming Contest☆17Apr 12, 2025Updated last year
- Using e-graphs for logic synthesis (ICCAD'25)☆33Updated this week
- Collection of digital hardware modules & projects (benchmarks)☆96Feb 27, 2026Updated 2 months ago
- An advanced header-only exact synthesis library☆31Nov 24, 2022Updated 3 years ago
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆147Jul 23, 2025Updated 9 months ago
- AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining☆18Nov 1, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Arche is a Greek word with primary senses "beginning". The repository defines a framework for technology mapping of emerging technologies…☆11May 15, 2020Updated 5 years ago
- This github repository summarizes relevant papers for shift left techniques in electronic design automation (EDA).☆32Sep 19, 2025Updated 7 months ago
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆44May 29, 2025Updated 11 months ago
- SIMPLER MAGIC: Synthesis and In-memory MaPping of Logic Execution in a single Row for Memristor Aided loGIC☆13Dec 5, 2019Updated 6 years ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 2 years ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- MLCAD 2020: Reinforcement for logic optimization sequence exploration☆29Oct 17, 2020Updated 5 years ago
- ☆29Jun 25, 2024Updated last year
- ☆31Apr 23, 2024Updated 2 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- ☆104Jun 20, 2025Updated 10 months ago
- Python library that provides methods for Boolean circuit manipulation, analysis, and synthesis☆33Feb 8, 2026Updated 2 months ago
- ☆46Mar 2, 2023Updated 3 years ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- C++ implementation of FRAIGs. Won the 1st place in 2018 Cadence-sponsored contest in NTU DSnP.☆10Oct 21, 2020Updated 5 years ago
- iEDA water-drop training initiative☆14Sep 10, 2024Updated last year
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year