lsils / percyLinks
C++ header-only exact synthesis library
☆18Updated 2 years ago
Alternatives and similar repositories for percy
Users that are interested in percy are comparing it to the libraries listed below
Sorting:
- IDEA project source files☆108Updated 2 weeks ago
- A logic synthesis tool☆82Updated last month
- C++ parsing library for simple formats used in logic synthesis and formal verification☆37Updated last year
- Collection of digital hardware modules & projects (benchmarks)☆65Updated last week
- EDA physical synthesis optimization kit☆62Updated last year
- Showcase examples for EPFL logic synthesis libraries☆198Updated last year
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆28Updated 5 years ago
- ☆106Updated 5 years ago
- GPU-based logic synthesis tool☆92Updated 2 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆85Updated 6 months ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆33Updated 4 months ago
- C++ logic network library☆258Updated last month
- Optimization results for superconducting electronic (SCE) circuits☆15Updated last year
- Tools for working with circuits as graphs in python☆125Updated last year
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated 11 months ago
- Next generation CGRA generator☆115Updated this week
- An advanced header-only exact synthesis library☆29Updated 2 years ago
- Builds, flow and designs for the alpha release☆54Updated 5 years ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆31Updated last year
- ☆18Updated 4 years ago
- ☆44Updated 5 years ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 2 years ago
- DATC Robust Design Flow.☆36Updated 5 years ago
- ☆27Updated last year
- Logic optimization and technology mapping tool.☆19Updated 2 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining☆18Updated 3 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆105Updated last year
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆62Updated last year
- ☆33Updated 5 years ago