scale-lab / BACSLinks
Benchmarks for Approximate Circuit Synthesis
☆17Updated 5 years ago
Alternatives and similar repositories for BACS
Users that are interested in BACS are comparing it to the libraries listed below
Sorting:
- ☆29Updated last year
- ☆59Updated 7 months ago
- Collection of digital hardware modules & projects (benchmarks)☆75Updated last month
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆39Updated 5 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆62Updated 7 months ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆55Updated last year
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆21Updated last year
- DATC RDF☆50Updated 5 years ago
- This is a python repo for flattening Verilog☆20Updated 3 weeks ago
- ☆20Updated 3 years ago
- ☆31Updated 2 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Updated 8 months ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆32Updated 2 years ago
- The release for paper "Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs"☆14Updated last year
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆20Updated 3 years ago
- This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".☆24Updated 2 years ago
- GPU-based logic synthesis tool☆97Updated last month
- ☆19Updated 5 years ago
- ☆27Updated last year
- FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool☆103Updated 6 months ago
- High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing☆53Updated last year
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆29Updated 5 years ago
- ☆37Updated 2 years ago
- ☆77Updated last week
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- Logic optimization and technology mapping tool.☆20Updated 2 years ago
- This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024☆53Updated 11 months ago
- ☆97Updated 6 months ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆141Updated 5 months ago
- ☆25Updated last year