A logic synthesis tool
☆84Sep 8, 2025Updated 5 months ago
Alternatives and similar repositories for also
Users that are interested in also are comparing it to the libraries listed below
Sorting:
- Showcase examples for EPFL logic synthesis libraries☆202Apr 5, 2024Updated last year
- C++ header-only exact synthesis library☆17Jan 18, 2023Updated 3 years ago
- IDEA project source files☆111Oct 15, 2025Updated 4 months ago
- Awesome machine learning for logic synthesis☆30Sep 21, 2022Updated 3 years ago
- ☆19Dec 21, 2020Updated 5 years ago
- C++ logic network library☆279Sep 30, 2025Updated 5 months ago
- DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)☆117May 18, 2023Updated 2 years ago
- C++ header-only reasoning library☆16Jul 11, 2024Updated last year
- Semi-Tenser Product based SAT and AllSAT solver, where it can solve CNF and circuit input.☆17Aug 2, 2023Updated 2 years ago
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 8 years ago
- An advanced circuit-based sat solver☆36Feb 24, 2025Updated last year
- A circuit toolkit☆107Feb 23, 2020Updated 6 years ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆144Jul 23, 2025Updated 7 months ago
- An advanced header-only exact synthesis library☆30Nov 24, 2022Updated 3 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆1,124Updated this week
- Logic Synthesis System from UC Berkeley (Unofficial Distribution)☆15Jun 4, 2019Updated 6 years ago
- ☆19Jul 12, 2024Updated last year
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 9 months ago
- C++ truth table library☆65Jul 30, 2025Updated 7 months ago
- Simple Python interface for ABC☆29May 19, 2023Updated 2 years ago
- ☆32Dec 2, 2023Updated 2 years ago
- AIGER And-Inverter-Graph Library☆97Feb 17, 2026Updated last week
- C++ parsing library for simple formats used in logic synthesis and formal verification☆39Jun 28, 2024Updated last year
- A copy of the latest version of MVSIS☆12Apr 18, 2021Updated 4 years ago
- An open-source design automation framework for Field-coupled Nanotechnologies☆86Updated this week
- GPU-based logic synthesis tool☆97Nov 27, 2025Updated 3 months ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆26Dec 23, 2025Updated 2 months ago
- EPFL logic synthesis benchmarks☆228Nov 18, 2025Updated 3 months ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 5 years ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- ☆28Nov 10, 2020Updated 5 years ago
- ☆14Jan 3, 2018Updated 8 years ago
- ☆14Sep 14, 2020Updated 5 years ago
- ☆13Dec 31, 2022Updated 3 years ago
- Logic optimization and technology mapping tool.☆20Oct 12, 2023Updated 2 years ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆25Apr 9, 2025Updated 10 months ago
- An Extensible Framework for Hardware Verification and Debugging☆18Sep 14, 2022Updated 3 years ago
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆21Dec 23, 2024Updated last year
- EDA wiki☆136Nov 3, 2025Updated 3 months ago