Re-host of ISCAS89 sequential benchmark circuits in higher level verilog (without "DFF")
☆17Dec 3, 2021Updated 4 years ago
Alternatives and similar repositories for iscas89_hl_verilog
Users that are interested in iscas89_hl_verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Lock circuitgraphs using various logic locking techniques☆11May 2, 2023Updated 2 years ago
- Benchmarks for Yosys development☆24Feb 17, 2020Updated 6 years ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆24May 24, 2025Updated 10 months ago
- EPFL logic synthesis benchmarks☆240Mar 3, 2026Updated last month
- Project of an integrated UART: RTL, Verification, Physical Implementation (Innovus) and GDSII.☆16May 28, 2021Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- VGA LCD Core (OpenCores)☆15May 22, 2018Updated 7 years ago
- Pipelined RISC-V CPU☆27Jun 9, 2021Updated 4 years ago
- ☆19Dec 21, 2020Updated 5 years ago
- Collection of digital hardware modules & projects (benchmarks)☆94Feb 27, 2026Updated last month
- download from opencores.org☆15May 4, 2018Updated 7 years ago
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆15Sep 28, 2017Updated 8 years ago
- ☆13Feb 3, 2025Updated last year
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- ☆10Dec 12, 2023Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Optimal gate sizing of digital circuits using geometric programming☆11Aug 18, 2016Updated 9 years ago
- ☆14Jun 12, 2024Updated last year
- The top repository for the code accompanying our paper "Mind the Gap: Studying the Insecurity of Provably Secure Embedded Trusted Executi…☆16Aug 3, 2022Updated 3 years ago
- Github repository of the AIStats 2024 paper: DE-HNN: An effective neural model for Circuit Netlist representation☆16Sep 3, 2025Updated 7 months ago
- ELVE : ELVE Logic Visualization Engine☆11Jul 2, 2017Updated 8 years ago
- Generator of arithmetic circuits (multipliers, adders) and approximate circuits☆41Aug 15, 2025Updated 8 months ago
- reference block design for the ASAP7nm library in Cadence Innovus☆63Jun 25, 2024Updated last year
- AVR CPU Core Implementation in Verilog HDL.☆15Oct 28, 2018Updated 7 years ago
- vRTLmod modifies Verilator generated RTL simulation code for faul-injection purposes. It transforms source code with the help of LLVM/C…☆18Mar 28, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 64-bit MISC Architecture CPU☆13Dec 13, 2016Updated 9 years ago
- This is a probabilistic SAT attack tool.☆13Jun 5, 2021Updated 4 years ago
- Equivalence checking with Yosys☆59Apr 9, 2026Updated last week
- A basic implementation of a SAT attack on logic locking.☆13Jun 30, 2021Updated 4 years ago
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- Static timing analysis (STA) is a method of validating the timing performance of a design by checking all possible paths for timing viola…☆16Oct 4, 2022Updated 3 years ago
- Providing examples on how to setup and use xschem, ngspice, and gaw, to do analog IC design☆15Jul 6, 2025Updated 9 months ago
- DTMF Receiver: Logic Synthesis and Physical Design using genus and innovus in 90nm process node☆15Dec 1, 2023Updated 2 years ago
- SMT Attack☆23Mar 5, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆21Sep 15, 2024Updated last year
- Arche is a Greek word with primary senses "beginning". The repository defines a framework for technology mapping of emerging technologies…☆11May 15, 2020Updated 5 years ago
- An automatic clock gating utility☆52Apr 15, 2025Updated last year
- ☆16Aug 15, 2021Updated 4 years ago
- ☆16Feb 9, 2022Updated 4 years ago
- Git repository to manage the fixes I need to make to the alliance-5.0-20090901 source for Mac OS X compiles.☆17Jul 23, 2010Updated 15 years ago
- ☆14Oct 23, 2018Updated 7 years ago