Alternatives and similar repositories for SCE-benchmarks

Users that are interested in SCE-benchmarks are comparing it to the libraries listed below

• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆59Updated 2 weeks ago
• jpsety / verilog_benchmark_circuits
  EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
  ☆27Updated 5 years ago
• lnis-uofu / LSOracle
  IDEA project source files
  ☆107Updated 9 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆86Updated last month
• nbulsi / also
  A logic synthesis tool
  ☆77Updated 3 weeks ago
• IntelLabs / FloorSet
  ☆74Updated last month
• ckchengucsd / SMT-based-STDCELL-Layout-Generator-for-PROBE2.0
  SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0
  ☆18Updated 5 years ago
• lsils / percy
  C++ header-only exact synthesis library
  ☆18Updated 2 years ago
• lnis-uofu / ML-Mapper
  ☆11Updated 2 years ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆60Updated last year
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆56Updated 3 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 5 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆82Updated 3 months ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆54Updated 6 months ago
• scale-lab / ABACUS
  ABACUS is a tool for approximate logic synthesis
  ☆14Updated 5 years ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆48Updated 8 months ago
• Yu-Maryland / Verilog-to-PyG
  ☆24Updated last year
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆47Updated 2 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• hriener / lorina
  C++ parsing library for simple formats used in logic synthesis and formal verification
  ☆37Updated last year
• pkuzjx / eda-collection
  ☆105Updated 5 years ago
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆51Updated 2 months ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆31Updated 5 years ago
• ckchengucsd / ILP-SAT-Detailed-Router
  ILP SAT Detailed Router
  ☆11Updated 5 years ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆38Updated 5 years ago
• NTU-LaDS-II / FAN_ATPG
  FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
  ☆93Updated last month
• Yu-Maryland / MapTune
  MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…
  ☆21Updated 4 months ago
• The-OpenROAD-Project-Attic / OpenROAD-Utilities
  Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project
  ☆19Updated 5 years ago