whaaswijk / percyLinks
An advanced header-only exact synthesis library
☆26Updated 2 years ago
Alternatives and similar repositories for percy
Users that are interested in percy are comparing it to the libraries listed below
Sorting:
- C++ parsing library for simple formats used in logic synthesis and formal verification☆36Updated 11 months ago
- C++ header-only exact synthesis library☆17Updated 2 years ago
- C++ header-only reasoning library☆16Updated 11 months ago
- C++ truth table library☆56Updated last month
- A circuit toolkit☆102Updated 5 years ago
- ☆16Updated 4 years ago
- AIGER And-Inverter-Graph Library☆79Updated 2 weeks ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆33Updated 11 months ago
- Optimization results for superconducting electronic (SCE) circuits☆14Updated last year
- CoreIR Symbolic Analyzer☆73Updated 4 years ago
- AMulet 2. - A better AIG Multiplier Examination Tool☆25Updated 2 years ago
- ☆22Updated last week
- Research paper based on or related to ABC.☆44Updated 2 weeks ago
- Showcase examples for EPFL logic synthesis libraries☆194Updated last year
- netlistDB - Intermediate format for digital hardware representation with graph database API☆31Updated 4 years ago
- A Modeling and Verification Platform for SoCs using ILAs☆78Updated 11 months ago
- ☆13Updated 4 years ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆31Updated last year
- Integer Multiplier Generator for Verilog☆23Updated last year
- Builds, flow and designs for the alpha release☆54Updated 5 years ago
- The PE for the second generation CGRA (garnet).☆17Updated last month
- OpenDesign Flow Database☆16Updated 6 years ago
- C++ logic network library☆232Updated last month
- Implementation of the Advanced Encryption Standard in Chisel☆20Updated 3 years ago
- A fork of the Kissat SAT solver with additional features. Supports incremental solving.☆14Updated 2 years ago
- IDEA project source files☆106Updated 7 months ago
- PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…☆22Updated last week
- ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set☆19Updated 6 months ago
- ☆10Updated 5 years ago
- Fast Symbolic Repair of Hardware Design Code☆24Updated 5 months ago