This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".
☆25Jul 12, 2023Updated 2 years ago
Alternatives and similar repositories for DeepGate
Users that are interested in DeepGate are comparing it to the libraries listed below
Sorting:
- ☆31Dec 2, 2023Updated 2 years ago
- ☆15May 24, 2023Updated 2 years ago
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆35Aug 25, 2024Updated last year
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆144Jul 23, 2025Updated 7 months ago
- Cell Layout Generation for DTCO/STCO Exploration Toolkit☆23May 24, 2025Updated 9 months ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆58Jan 8, 2025Updated last year
- Python version of tools to work with AIG formatted files☆12May 20, 2025Updated 9 months ago
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆26May 29, 2022Updated 3 years ago
- Timing prediction dataset download and instructions.☆17Jun 7, 2023Updated 2 years ago
- ☆16Dec 30, 2023Updated 2 years ago
- GPU-based logic synthesis tool☆97Nov 27, 2025Updated 3 months ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 5 years ago
- ANSI-C benchmarks generated from Verilog RTL circuits with safety assertions. Used for Formal Property Verification.☆17Dec 1, 2018Updated 7 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆19Jul 22, 2020Updated 5 years ago
- An Extensible Framework for Hardware Verification and Debugging☆18Sep 14, 2022Updated 3 years ago
- DeepGate3 for ICCAD2024☆13May 26, 2025Updated 9 months ago
- Tools for manipulating CHC and related files☆15Apr 21, 2023Updated 2 years ago
- ☆10Aug 22, 2023Updated 2 years ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated 11 months ago
- py-aiger: A python library for manipulating sequential and combinatorial circuits encoded using `and` & `inverter` gates (AIGs).☆49Dec 21, 2025Updated 2 months ago
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated 11 months ago
- A continuous local search SAT solver based on Fourier expansion for hybrid Boolean constraints.☆12Sep 18, 2024Updated last year
- Arithmetic multiplier benchmarks☆12Nov 13, 2017Updated 8 years ago
- propositional satisfiability problem (SAT) goes neural and deep☆12Aug 17, 2021Updated 4 years ago
- ☆10Oct 15, 2021Updated 4 years ago
- GuidedSampler: Coverage-guided Sampling of SMT Solutions☆15Jul 9, 2025Updated 7 months ago
- An advanced circuit-based sat solver☆36Feb 24, 2025Updated last year
- A logic synthesis tool☆84Sep 8, 2025Updated 5 months ago
- Awesome machine learning for logic synthesis☆30Sep 21, 2022Updated 3 years ago
- ☆14Oct 8, 2024Updated last year
- Official Repository for the ICLR 2022 paper "Generalization of Neural Combinatorial Solvers through the Lens of Adversarial Robustness"☆13Nov 20, 2022Updated 3 years ago
- Official repository for paper "Goal-Aware Neural SAT Solver"☆17Jun 10, 2023Updated 2 years ago
- DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction (ASP-DAC 2024)☆13Nov 2, 2023Updated 2 years ago
- EPFL logic synthesis benchmarks☆228Nov 18, 2025Updated 3 months ago
- PyTorch implementation of NeuroSAT☆28May 21, 2023Updated 2 years ago
- AIGER And-Inverter-Graph Library☆97Feb 17, 2026Updated last week
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆31Jan 17, 2020Updated 6 years ago
- A fork of the Kissat SAT solver with additional features. Supports incremental solving.☆17Aug 13, 2022Updated 3 years ago
- GPU-enabled Hardware Fuzzer using Genetic Algorithm☆20Jul 12, 2023Updated 2 years ago