lsils / mockturtleLinks
C++ logic network library
☆275Updated 4 months ago
Alternatives and similar repositories for mockturtle
Users that are interested in mockturtle are comparing it to the libraries listed below
Sorting:
- Showcase examples for EPFL logic synthesis libraries☆202Updated last year
- EPFL logic synthesis benchmarks☆227Updated 2 months ago
- IDEA project source files☆111Updated 3 months ago
- A logic synthesis tool☆84Updated 4 months ago
- Research paper based on or related to ABC.☆70Updated 2 weeks ago
- GPU-based logic synthesis tool☆97Updated 2 months ago
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆39Updated last month
- Collection of digital hardware modules & projects (benchmarks)☆80Updated 2 months ago
- Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation☆231Updated last week
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆109Updated last year
- AIGER And-Inverter-Graph Library☆97Updated 3 weeks ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆190Updated 8 months ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆63Updated last year
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆61Updated last year
- Rsyn – An Extensible Physical Synthesis Framework☆137Updated last year
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆169Updated 9 months ago
- C++ parsing library for simple formats used in logic synthesis and formal verification☆38Updated last year
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆30Updated 6 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆91Updated 9 months ago
- ☆109Updated 6 years ago
- A circuit toolkit☆107Updated 5 years ago
- ☆42Updated 3 years ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆91Updated 5 years ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- UCSD Detailed Router☆95Updated 5 years ago
- Problems and Results of IWLS 2022 Programming Contest☆21Updated 9 months ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆142Updated 2 years ago
- MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…☆22Updated 9 months ago
- A Standalone Structural Verilog Parser☆99Updated 3 years ago
- Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes☆76Updated 3 weeks ago