Alternatives and similar repositories for LSOracle:

Users that are interested in LSOracle are comparing it to the libraries listed below

• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆100Updated last year
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆56Updated 9 months ago
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆46Updated 2 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆48Updated 4 months ago
• nbulsi / also
  A logic synthesis tool
  ☆72Updated 2 years ago
• pkuzjx / eda-collection
  ☆103Updated 5 years ago
• cuhk-eda / ripple-fpga
  RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
  ☆90Updated 5 years ago
• parallaxsw / OpenSTA
  ☆62Updated this week
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆79Updated 2 months ago
• lsils / lstools-showcase
  Showcase examples for EPFL logic synthesis libraries
  ☆192Updated 11 months ago
• panhomyoung / phyLS
  A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…
  ☆25Updated last week
• PrincetonUniversity / OPDB
  OpenPiton Design Benchmark
  ☆25Updated 2 years ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆43Updated 2 months ago
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆50Updated last year
• lsils / benchmarks
  EPFL logic synthesis benchmarks
  ☆181Updated 6 months ago
• jpsety / verilog_benchmark_circuits
  EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
  ☆25Updated 5 years ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆150Updated 2 months ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆84Updated 4 years ago
• OpenTimer / Parser-Verilog
  A Standalone Structural Verilog Parser
  ☆89Updated 2 years ago
• The-OpenROAD-Project / asap7
  ☆138Updated last week
• ABKGroup / PROBE3.0
  ☆41Updated 11 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆81Updated 8 months ago
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆138Updated last month
• lsils / mockturtle
  C++ logic network library
  ☆225Updated 5 months ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆49Updated 4 months ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆123Updated 8 months ago
• mflowgen / freepdk-45nm
  ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
  ☆166Updated 5 years ago
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆25Updated 4 years ago
• vaughnbetz / COFFE
  ☆41Updated 6 months ago