Xilinx / Vitis-AILinks
Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
☆1,666Updated 7 months ago
Alternatives and similar repositories for Vitis-AI
Users that are interested in Vitis-AI are comparing it to the libraries listed below
Sorting:
- ☆479Updated 3 weeks ago
- Vitis In-Depth Tutorials☆1,481Updated 3 weeks ago
- Dataflow compiler for QNN inference on FPGAs☆901Updated this week
- Vitis Libraries☆1,045Updated last month
- Vitis_Accel_Examples☆569Updated 3 months ago
- Run Time for AIE and FPGA based platforms☆633Updated this week
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆877Updated last year
- Quantized Neural Networks (QNNs) on PYNQ☆702Updated 3 years ago
- Machine learning on FPGAs using HLS☆1,689Updated this week
- ☆740Updated 4 months ago
- An OpenCL-based FPGA Accelerator for Convolutional Neural Networks☆1,356Updated 3 years ago
- Python Productivity for ZYNQ☆2,229Updated last week
- Brevitas: neural network quantization in PyTorch☆1,428Updated last week
- Master Thesis "ZynqNet: An FPGA-Accelerated Embedded Convolutional Neural Network"☆763Updated 8 years ago
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆435Updated 5 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆333Updated 6 years ago
- This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.☆778Updated 5 years ago
- RTL, Cmodel, and testbench for NVDLA☆1,964Updated 3 years ago
- ☆250Updated 5 years ago
- DPU on PYNQ☆232Updated 3 months ago
- Tutorial notebooks for hls4ml☆390Updated last week
- ☆133Updated 3 weeks ago
- Implementation of a Tensor Processing Unit for embedded systems and the IoT.☆514Updated 6 years ago
- FPGA Accelerator for CNN using Vivado HLS☆326Updated 4 years ago
- ☆454Updated last year
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆370Updated 10 months ago
- NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.☆369Updated last year
- NVDLA SW☆508Updated 4 years ago
- Dataflow QNN inference accelerator examples on FPGAs☆237Updated 2 months ago
- Getting Started with Xilinx ML Suite☆339Updated 4 years ago