☆29Jun 10, 2019Updated 6 years ago
Alternatives and similar repositories for Open-Dnn
Users that are interested in Open-Dnn are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆19Dec 3, 2019Updated 6 years ago
- Bottom up designed feed forward network functions for CNN applications☆13Jan 15, 2019Updated 7 years ago
- ☆15Jul 7, 2020Updated 5 years ago
- ☆13Jun 20, 2023Updated 2 years ago
- [FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs☆25Feb 14, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆35Mar 1, 2019Updated 7 years ago
- A reference implementation of the Mind Mappings Framework.☆30Dec 2, 2021Updated 4 years ago
- ☆23Feb 18, 2025Updated last year
- Vitis AI Lab: MNIST classifier☆19Aug 11, 2022Updated 3 years ago
- ☆23Mar 28, 2023Updated 3 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆93May 25, 2019Updated 6 years ago
- ☆245Jun 21, 2022Updated 3 years ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆241Dec 8, 2022Updated 3 years ago
- ☆25May 9, 2019Updated 7 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- P4 compatible HLS modules☆11Apr 23, 2018Updated 8 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆228Apr 22, 2019Updated 7 years ago
- ☆12Jul 24, 2018Updated 7 years ago
- BiSUNA framework specialized to compile for the Xilinx Alveo U50☆13Dec 3, 2020Updated 5 years ago
- Automatic Schedule Exploration and Optimization Framework for Tensor Computations☆184Apr 25, 2022Updated 4 years ago
- ☆63Aug 4, 2023Updated 2 years ago
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Sep 14, 2020Updated 5 years ago
- Getting Started with Xilinx ML Suite☆337Jan 6, 2021Updated 5 years ago
- HLSyn benchmark for paper "Towards a Comprehensive Benchmark for FPGA Targeted High-Level Synthesis"☆32Dec 13, 2023Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ACM TODAES Best Paper Award, 2022☆34Oct 24, 2023Updated 2 years ago
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆338Apr 20, 2024Updated 2 years ago
- The code for our paper "Neural Architecture Search as Program Transformation Exploration"☆16Apr 28, 2021Updated 5 years ago
- ☆785Mar 20, 2026Updated 2 months ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆341Jan 20, 2025Updated last year
- RISC-V ISA based 32-bit processor written in HLS☆16Nov 7, 2019Updated 6 years ago
- ☆74Mar 22, 2020Updated 6 years ago
- ☆45Jun 30, 2024Updated last year
- PYNQ, Neural network Language model, Overlay☆112Apr 26, 2019Updated 7 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- A collection of URLs related to High Level Synthesis (HLS).☆13Jun 26, 2021Updated 4 years ago
- ☆119Dec 20, 2017Updated 8 years ago
- ☆19Jun 17, 2022Updated 3 years ago
- HLS-based Graph Processing Framework on FPGAs☆152Oct 11, 2022Updated 3 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆33May 30, 2019Updated 6 years ago
- LLM4HWDesign Starting Toolkit☆19Oct 4, 2024Updated last year
- ☆53Jul 24, 2019Updated 6 years ago