microideax / Open-DnnLinks
☆29Updated 6 years ago
Alternatives and similar repositories for Open-Dnn
Users that are interested in Open-Dnn are comparing it to the libraries listed below
Sorting:
- A reference implementation of the Mind Mappings Framework.☆30Updated 3 years ago
- Tool for optimize CNN blocking☆93Updated 5 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆29Updated 3 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- Release of stream-specialization software/hardware stack.☆119Updated 2 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- ☆71Updated 5 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆66Updated 4 years ago
- agile hardware-software co-design☆52Updated 3 years ago
- ☆32Updated 4 years ago
- ☆72Updated 2 years ago
- RTL implementation of Flex-DPE.☆113Updated 5 years ago
- ☆41Updated last year
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆117Updated 4 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆58Updated 2 weeks ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆60Updated 3 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆78Updated 6 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆113Updated 2 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆142Updated 4 months ago
- ☆28Updated 2 years ago
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆66Updated 5 years ago
- ☆36Updated 7 months ago
- ☆16Updated 3 years ago
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆87Updated last year
- NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators☆21Updated 7 months ago
- ☆101Updated last year