microideax / Open-Dnn
☆27Updated 5 years ago
Alternatives and similar repositories for Open-Dnn:
Users that are interested in Open-Dnn are comparing it to the libraries listed below
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- ☆69Updated 4 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆67Updated 3 years ago
- Designs for finalist teams of the DAC System Design Contest☆36Updated 4 years ago
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- ☆31Updated 3 years ago
- ☆23Updated 4 years ago
- ☆25Updated 3 years ago
- ☆25Updated 9 months ago
- ☆71Updated last year
- RTL implementation of Flex-DPE.☆97Updated 4 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- ☆39Updated 7 months ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆60Updated 3 years ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆60Updated 5 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆66Updated 5 years ago
- A general framework for optimizing DNN dataflow on systolic array☆33Updated 4 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆47Updated last week
- MICRO22 artifact evaluation for Sparseloop☆41Updated 2 years ago
- HLS implemented systolic array structure☆41Updated 7 years ago
- Heterogenous ML accelerator☆17Updated 3 months ago
- ☆33Updated 5 years ago
- research, experimentation and implementation of hardware-agnostic accelerated DL framework☆35Updated 3 weeks ago
- ☆33Updated 3 years ago
- ☆16Updated 2 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆84Updated 4 months ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆35Updated last year
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆54Updated 3 years ago
- ☆20Updated last month