Alternatives and similar repositories for Vitis-In-Depth-Tutorial

Users that are interested in Vitis-In-Depth-Tutorial are comparing it to the libraries listed below

• Xilinx / Vitis_Embedded_Platform_Source
  ☆137Updated 2 months ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆157Updated 4 months ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆241Updated 5 months ago
• Xilinx / SDSoC-Tutorials
  SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
  ☆155Updated 6 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆107Updated 7 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆107Updated 3 years ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆334Updated last year
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆49Updated 5 years ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆213Updated 3 weeks ago
• spcl / hls_tutorial_examples
  Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
  ☆204Updated 4 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆189Updated 6 years ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆180Updated 6 years ago
• Xilinx / Embedded-Reference-Platforms-User-Guide
  Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …
  ☆11Updated last year
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆374Updated last year
• Xilinx / kria-vitis-platforms
  Kria Vitis platforms and overlays
  ☆112Updated 8 months ago
• Xilinx / SDAccel-Tutorials
  SDAccel Development Environment Tutorials
  ☆109Updated 5 years ago
• Xilinx / SDSoC_Examples
  ☆83Updated 5 years ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆140Updated 3 weeks ago
• Er1cZ / Deploying_CNN_on_FPGA_using_OpenCL
  Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…
  ☆114Updated 7 years ago
• Xilinx / QNN-MO-PYNQ
  ☆250Updated 5 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆106Updated last year
• Xilinx / PYNQ-BOT
  ☆30Updated 7 years ago
• Xilinx / Kria-PYNQ
  PYNQ support and examples for Kria SOMs
  ☆123Updated last year
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆74Updated last year
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆282Updated 6 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆112Updated 6 years ago
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆94Updated 4 years ago
• Xilinx / Vivado-Design-Tutorials
  ☆248Updated this week
• Xilinx / RFNoC-HLS-NeuralNet
  ☆109Updated 6 years ago
• Xilinx / XilinxBoardStore
  ☆312Updated this week