Vitis HLS LLVM source code and examples
☆408Sep 30, 2025Updated 7 months ago
Alternatives and similar repositories for HLS
Users that are interested in HLS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- DASS HLS Compiler☆31Oct 4, 2023Updated 2 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained. Community-maintained version with binar…☆189Mar 8, 2026Updated 2 months ago
- Build Customized FPGA Implementations for Vivado☆375Updated this week
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Feb 17, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A scalable High-Level Synthesis framework on MLIR☆296May 15, 2024Updated 2 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆171Nov 7, 2023Updated 2 years ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆241Dec 8, 2022Updated 3 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆340Jan 20, 2025Updated last year
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing (FPGA'19 Best Paper)☆338Apr 20, 2024Updated 2 years ago
- Vitis Libraries☆1,099Feb 10, 2026Updated 3 months ago
- ☆785Mar 20, 2026Updated 2 months ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Mar 17, 2022Updated 4 years ago
- XLS: Accelerated HW Synthesis☆1,492Updated this week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆87Mar 5, 2024Updated 2 years ago
- The Shang high-level synthesis framework☆120May 29, 2014Updated 11 years ago
- A Generic Distributed Auto-Tuning Infrastructure☆24Jul 29, 2021Updated 4 years ago
- Circuit IR Compilers and Tools☆2,129Updated this week
- A high-level performance analysis tool for FPGA-based accelerators☆19Jun 2, 2017Updated 8 years ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆55Jul 17, 2023Updated 2 years ago
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆98Jan 29, 2026Updated 3 months ago
- Vitis_Accel_Examples☆594Mar 30, 2026Updated last month
- An open source high level synthesis (HLS) tool built on top of LLVM☆130Jun 11, 2024Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆100Sep 27, 2024Updated last year
- PandA-bambu public repository☆327Feb 10, 2026Updated 3 months ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆385Jan 20, 2025Updated last year
- ☆73Feb 16, 2023Updated 3 years ago
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 4 years ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆297Oct 30, 2025Updated 6 months ago
- ☆43Oct 10, 2025Updated 7 months ago
- HLS-based Graph Processing Framework on FPGAs☆152Oct 11, 2022Updated 3 years ago
- An MLIR-based toolchain for AMD AI Engine-enabled devices.☆635Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆206Nov 14, 2021Updated 4 years ago
- Machine learning on FPGAs using HLS☆1,976Updated this week
- Hi-DMM: High-Performance Dynamic Memory Management in HLS (High-Level Synthesis)☆25Oct 30, 2018Updated 7 years ago
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,226May 13, 2026Updated last week
- Vitis In-Depth Tutorials☆1,575Mar 25, 2026Updated last month
- Introductory examples for using PYNQ with Alveo☆54Mar 14, 2023Updated 3 years ago
- Languages, Tools, and Techniques for Accelerator Design☆33Nov 2, 2021Updated 4 years ago