Xilinx / Vitis_Embedded_Platform_SourceLinks
☆135Updated 2 weeks ago
Alternatives and similar repositories for Vitis_Embedded_Platform_Source
Users that are interested in Vitis_Embedded_Platform_Source are comparing it to the libraries listed below
Sorting:
- ☆117Updated 4 years ago
- DPU on PYNQ☆234Updated 3 months ago
- This project is trying to create a base vitis platform to run with DPU☆48Updated 5 years ago
- Board files to build Ultra 96 PYNQ image☆156Updated 2 months ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆155Updated 5 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆108Updated 7 years ago
- Kria Vitis platforms and overlays☆107Updated 6 months ago
- Vitis HLS Library for FINN☆210Updated 2 months ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆108Updated 3 years ago
- A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.☆332Updated 10 months ago
- PYNQ Composabe Overlays☆73Updated last year
- Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …☆11Updated last year
- Avnet Board Definition Files☆138Updated 2 months ago
- ☆250Updated 5 years ago
- ☆83Updated 5 years ago
- ☆306Updated 2 weeks ago
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆76Updated 2 years ago
- Computer Vision Overlays on Pynq☆189Updated 6 years ago
- Vitis_Accel_Examples☆575Updated 2 weeks ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆113Updated 7 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆335Updated 6 years ago
- Free TPU for FPGA with compiler supporting Pytorch/Caffe/Darknet/NCNN. An AI processor for using Xilinx FPGA to solve image classificatio…☆267Updated 2 years ago
- ☆237Updated 4 months ago
- Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.☆372Updated 10 months ago
- RISC-V Integration for PYNQ☆179Updated 6 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆54Updated 7 years ago
- Zynq-7000 DPU TRD☆46Updated 6 years ago
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆204Updated 4 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆69Updated 6 years ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆287Updated last month