Alternatives and similar repositories for Vitis_Embedded_Platform_Source:

Users that are interested in Vitis_Embedded_Platform_Source are comparing it to the libraries listed below

• Xilinx / Vitis-In-Depth-Tutorial
  ☆116Updated 3 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆208Updated last year
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆153Updated last month
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆47Updated 4 years ago
• Xilinx / Embedded-Reference-Platforms-User-Guide
  Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …
  ☆11Updated 10 months ago
• Xilinx / kria-vitis-platforms
  Kria Vitis platforms and overlays
  ☆92Updated this week
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆98Updated 2 years ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆189Updated last month
• Xilinx / SDSoC-Tutorials
  SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
  ☆147Updated 5 years ago
• Xilinx / SDSoC_Examples
  ☆83Updated 4 years ago
• Er1cZ / Deploying_CNN_on_FPGA_using_OpenCL
  Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…
  ☆102Updated 6 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆70Updated 7 months ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆103Updated 6 years ago
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆130Updated 5 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆68Updated 6 years ago
• Xilinx / Kria-PYNQ
  PYNQ support and examples for Kria SOMs
  ☆101Updated 5 months ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆320Updated last week
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆54Updated 3 years ago
• Xilinx / Vivado-Design-Tutorials
  ☆174Updated 2 weeks ago
• wutianze / dnndk-pynqz2
  First lesson for you to use DNNDK, also it can be helpful for your AI learning
  ☆67Updated last year
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆129Updated 3 weeks ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆167Updated 5 years ago
• learnwithexamples / learnsystemc
  Learn systemC with examples
  ☆105Updated 2 years ago
• xupgit / High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
  This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…
  ☆71Updated 5 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆175Updated 5 years ago
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆144Updated last year
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆311Updated last week
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆105Updated 5 years ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆81Updated last year