☆511Jan 16, 2026Updated 6 months ago
Alternatives and similar repositories for Vitis-AI-Tutorials
Users that are interested in Vitis-AI-Tutorials are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.☆1,796Feb 24, 2026Updated 5 months ago
- Vitis In-Depth Tutorials☆1,598Updated this week
- DPU on PYNQ☆248Aug 12, 2025Updated 11 months ago
- Vitis Libraries☆1,116Jun 24, 2026Updated last month
- ☆79Jul 27, 2022Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Kria Vitis platforms and overlays☆120Updated this week
- This project is trying to create a base vitis platform to run with DPU☆49Jul 8, 2020Updated 6 years ago
- PYNQ support and examples for Kria SOMs☆143Mar 27, 2026Updated 4 months ago
- ☆802Jul 13, 2026Updated 3 weeks ago
- ☆16Mar 22, 2021Updated 5 years ago
- Dataflow compiler for QNN inference on FPGAs☆1,038Updated this week
- Vitis HLS Library for FINN☆226May 27, 2026Updated 2 months ago
- ☆120Jul 15, 2021Updated 5 years ago
- Vitis_Accel_Examples☆604Jun 15, 2026Updated last month
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Machine learning on FPGAs using HLS☆2,093Updated this week
- ☆33Mar 30, 2023Updated 3 years ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆111Oct 31, 2022Updated 3 years ago
- ☆140Jul 16, 2026Updated 3 weeks ago
- Dataflow QNN inference accelerator examples on FPGAs☆261Mar 10, 2026Updated 5 months ago
- A demo for accelerating YOLOv2 in xilinx's fpga pynq/zedboard☆920Jul 29, 2024Updated 2 years ago
- Tutorial notebooks for hls4ml☆440Jul 28, 2026Updated last week
- Vitis-AI 1.3 TensorFlow2 flow with a custom CNN model, targeted ZCU102 evaluation board.☆15Apr 6, 2021Updated 5 years ago
- ☆16Jul 15, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- For v1.2 test☆12Sep 5, 2020Updated 5 years ago
- CNN based Deep Learning for Detecting COVID-19 from X-Ray images.The Deep Learning is deployed in AWS IoT GreenGrass with Xilinx ZCU104 …☆20Sep 7, 2020Updated 5 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆158Jan 23, 2020Updated 6 years ago
- Run Time for AIE and FPGA based platforms☆679Updated this week
- Python Productivity for ZYNQ☆2,335Updated this week
- Implement Tiny YOLO v3 on ZYNQ☆321Apr 14, 2025Updated last year
- ☆246Jun 21, 2022Updated 4 years ago
- A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.☆453Dec 2, 2019Updated 6 years ago
- ☆37Jul 3, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Board files to build Ultra 96 PYNQ image☆159Sep 14, 2025Updated 10 months ago
- Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …☆11Mar 22, 2024Updated 2 years ago
- ☆17Oct 11, 2022Updated 3 years ago
- Brevitas: neural network quantization in PyTorch☆1,562Updated this week
- The second place winner for DAC-SDC 2020☆101Apr 23, 2022Updated 4 years ago
- ☆479Sep 10, 2024Updated last year
- An OpenCL-based FPGA Accelerator for Convolutional Neural Networks☆1,384Feb 14, 2022Updated 4 years ago